High-speed low-power circuits fabricated using a submicron NMOS technology

A photoresist-ashing process has been developed which, when used in conjunction with conventional g-line optical lithography, permits the controlled definition of deep-submicrometer features. The ultra-fine lines were obtained by calibrated ashing of the lithographically defined features in oxygen plasma. The technique has been successfully employed to fabricate MOSFET's with effective channel length as small as 0.15 pm that show excellent characteristics. An NMOS ring oscillator with 0.2-pm devices has been fabricated with a room-temperature propagation delay of 22 pslstage which is believed to be the fastest value obtained for a MOS technology. Studies indicate that the thinning is both reproducible and uniform so that it should be usable in circuit as well as device fabrication. Since most polymer-based resist materials are etchable with an oxygen plasma, the basic technique could be extended to supplement other lithographic processes, including e-beam and X-ray processes, for fabricating both silicon and nonsilicon devices and circuits.

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1.7 Gb/s NMOS laser driver

Shastri

Wong

Yanushefski

Proceedings of the IEEE 1988 Custom Integrated Circuits Conference

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High-speed low-power circuits fabricated using a submicron NMOS technology

Cited by 8 publications

References 3 publications

Multilevel Metallization Schemes

Multilevel Metallization Schemes

Deep-submicrometer MOS device fabrication using a photoresist-ashing technique

1.7 Gb/s NMOS laser driver

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