High Speed Multichannel Charge Sensitive Data Acquisition System With Self-Triggered Event Timing

Abstract

A number of modern experiments require simultaneous measurement of charges on multiple channels at > MHz event rates with an accuracy of 100-1000 e − rms. One widely used data processing scheme relies on application of specific integrated circuits enabling multichannel analog peak detection asserted by an external trigger followed by a serial/sparsified readout. Although this configuration minimizes the back end electronics, its counting rate capability is limited by the speed of the serial readout. Recent advances in analog to digital converters and FPGA devices enable fully parallel high speed multichannel data processing with digital peak detection enhanced by finite impulse response filtering. Not only can accurate charge values be obtained at high event rates, but the timing of the event on each channel can also be determined with high accuracy.We present the concept and first experimental tests of fully parallel 128-channel charge sensitive data processing electronics capable of measuring charges with accuracy of ~1000 e-rms. Our system does not require an external trigger and, in addition to charge values, it provides the event timing with an accuracy of ~1 ns FWHM. One of the possible applications of this system is high resolution position sensitive event counting detectors with microchannel plates combined with cross strip readout. Implementation of fast data acquisition electronics increases the counting rates of those detectors to multi-MHz level, preserving their unique capability of virtually noiseless detection of both position (with accuracy of ~10 μm FWHM) and timing (~1 ns FWHM) of individual particles, including photons, electrons, ions, neutrals, and neutrons.

Phasor imaging with a widefield photon-counting detector

“…In the experiments described here, we used a H33D prototype (H33D Gen I) equipped with a crossed-delay line (XDL) anode. 10 A new prototype using a different technology (H33D Gen II with cross-strip or XS anode), 69 is now under test in our laboratory and will be described in future publications.…”

Centroiding algorithms for high speed crossed-strip readout of microchannel plate detectors

“…In previous papers [3, 4, 5], we have demonstrated the performance of XS readouts that can achieve very high spatial resolution (< 6 microns FWHM) using low noise amplifiers and laboratory ADCs with the centroiding calculations done inside the computer. We have since replaced the ADC/computer system with the Parallel Cross Strip (PXS) electronics [5] which consists of 64 × 12 bit ADCs continuously sampling their inputs and transferring their outputs to a Virtex 5 FPGA via 300MHz double edge LVDS outputs.…”

Wide-field TCSPC: methods and applications

“…An amplifier is required for each strip, but this geometry allows higher event detection rate than a delay line anode as several photons can be detected in one excitation cycle [112,113].…”