High temperature performance and operation of HFETs

Wilson, Craig D.; O'Neill, AG; Baier, S.M.; Nohava, J.C.

doi:10.1109/16.481718

Cited by 16 publications

(9 citation statements)

References 9 publications

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“…Based on (1), while the temperature is increased, the threshold voltage decreases owing to the increase of the intrinsic channel carrier concentration n 2DEG [13] and the lowering of the Schottky barrier height Φ B [16], [17]. Moreover, the decrease of V th is partly caused by the leakage current from a semiinsulating substrate with increasing temperature [14].…”

Section: Resultsmentioning

confidence: 99%

Evaluation of Electrical Characteristics of the Copper Metallized SPDT GaAs Switches at Elevated Temperatures

Chang

Lin

et al. 2009

IEEE Trans. Device Mater. Relib.

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Copper-metallized AlGaAs/InGaAs pseudomophic high-electron mobility transistor single-pole-double-throw (SPDT) switches utilizing platinum (Pt, 70 nm) as the diffusion barrier have been studied and demonstrated. As compared with the Au-metallized switches, the Cu-metallized SPDT switches exhibited comparable performance with insertion loss less than 0.5 dB, return loss larger than 20 dB, isolation larger than 35 dB, and the input power for 1-dB compression (input P 1 dB ) of 28.3 dBm at 2.5 GHz. In order to evaluate the temperaturedependent impact on dc and RF characteristics of the coppermetallized switches for high-temperature applications, the switches have been tested at different temperatures. The device exhibits low thermal threshold coefficients (δV th /δT ) of −0.25 mV/K from 300 K to 500 K, good microwave performance at 380 K with insertion loss less than 0.5 dB, isolation higher than 40 dB, and the input power for 1-dB compression (input P 1 dB ) of 28.45 dBm at 2.5 GHz. To test the thermal stability of the Pt diffusion barrier, these switches were annealed at 250 • C for 20 h. After the annealing, the switches showed no degradation of the dc characteristics. In addition, after a high temperature storage life environment test at 150 • C, these copper-metallized switches remained capable of excellent power handling. To test the operation reliability of the copper-metallized switches, the copper-metallized switches were subjected to ON/OFF (control voltage = +3/0 V exchange) stress test for 24 h at room temperature. The devices maintained excellent RF characteristics after the stress test. Consequently, it is successfully demonstrated through these tests that copper metallization using Pt as the diffusion barrier could be applied to the GaAs monolithic microwave integrated circuit switch fabrication with good RF performance, high-temperature characteristics, and reliability.Index Terms-Copper metallization, platinum, pseudomophic high-electron mobility transistor (PHEMT), single-pole-doublethrow (SPDT), switch, temperature.

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Section: Resultsmentioning

confidence: 99%

Evaluation of Electrical Characteristics of the Copper Metallized SPDT GaAs Switches at Elevated Temperatures

Chang

Lin

et al. 2009

IEEE Trans. Device Mater. Relib.

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“…In the following we describe how these effects are incorporated in our HFET model. According to Wilson et al, 51 the limiting factor in high temperature operation of GaAs CHFET circuits is the reverse bias gate leakage current. In the present model, we use the following expressions for the source-gate and drain-gate current components 3 : taking into consideration the distribution of activation energies in the band gap due to the DX centers, we found that the following equation describes the temperature dependence of g gr very well over the temperature range considered:…”

Section: Temperature Dependenciesmentioning

confidence: 99%

“…Wilson et al have demonstrated successful operation up to 420° C of GaAs CHFET ring oscillators. 51 Therefore, successful design and simulation of high temperature electronic circuits necessitates the incorporation of temperature effects in the CAD models.…”

Section: Introductionmentioning

confidence: 99%

Spice Modeling of Compound Semiconductor Devices

Iñı́guez

Fjeldly

Shur

et al. 1998

Int. J. Hi. Spe. Ele. Syst.

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We review recent advances in the modeling of novel and advanced semiconductor devices, including state-of-the-art MESFET and HFETs, heterodimensional FETs, resonant tunneling devices, and wide-bandgap semiconductor transistors. We emphasize analytical, physics-based modeling incorporating the important effects present in modern day devices, including deep sub-micrometer devices. Such an approach is needed in order to accurately describe and predict both stationary and dynamic device behavior and to make the models suitable for implementation in advanced computer aided design tool including circuit simulators such as SPICE.Hence, a strong impetus exists for discussing these crucial aspects of advanced device modeling for circuit simulators and other computer aided design (CAD) tools. A better understanding of these issues may help speed the transfer of knowledge on new processes and devices and allow the circuit design houses access to the latest in device technology with minimal delay.The FET models considered here are mostly based on the unified modeling concept, where continuous analytical expressions for current voltage (I-V) and capacitance voltage (C-V) characteristics are used for all bias conditions, with no discontinuities in derivatives to any order. 1 ' 2 A brief review of this modeling strategy is presented in Sec. 2.Proven device concepts such as metal-semiconductor FETs (MESFETs) and heterostructure FETs (HFETs) are solidly entrenched in the high-speed/highfrequency electronics market, and in high-power/high-temperature applications. The race for improved performance is evident in the compound semiconductor device technology, with a drive towards reduced dimensions, new material combinations, and improved and novel device structures. In Sec. 3, we consider recent progress in the modeling of GaAs based MESFETs and HFETs that includes improved descriptions of transistor characteristics, thermal effects, gate leakage, and device capacitances. [3][4][5][6] Device scientists and engineers worldwide are engaged in developing novel device technologies intended to meet the even more stringent demands of the future, including those posed by new and special applications. As an example, we consider in Sec. 4 the modeling of heterodimensional devices, including two-dimensional (2D) MESFETs and 2D resonant tunneling diodes and transistors, which utilize electronic systems of different dimensionality. These devices demonstrate remarkable properties in terms of short-channel effects, intrinsic capacitances, power dissipation and versatility in logic circuits. As another example, we consider in Sec. 5 devices fabricated from wide-bandgap semiconductors such as SiC and GaN. These devices, which presently attract a great deal of attention, have unique properties needed for high-power/high-frequency/high-temperature applications.Many of the device models discussed here have been implemented in the circuit simulator AIM-Spice, 7 which runs on PCs and on other workstation platforms supporting the WindowsNT operating syst...

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“…The wide-gap ''insulator'' layer offers a large breakdown electric field, and the high barrier prevents additional gate leakage current. 8 This causes a leakage path through the substrate and results in excessive leakage current. 2,3 On the other hand, there is a growing need for higher temperature tolerance in the area of automotive, aircraft, space technology, and other applications that must be exposed to harsh thermal environments.…”

Section: Introductionmentioning

confidence: 99%

Study of InGaP/GaAs/InGaAs high-barrier gate and heterostructure-channel field-effect transistors

Lin

Yen

et al. 2002

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Articles you may be interested inDesign and characteristics of strained InAs/InAlAs composite-channel heterostructure field-effect transistors J. Appl. Phys. 97, 024505 (2005); 10.1063/1.1831545Characteristics of In 0.52 Al 0.48 As/In x Ga 1−x As y P 1−y / In 0.52 Al 0.48 As high electron-mobility transistors Gate leakage current mechanisms in AlGaN/GaN heterostructure field-effect transistors Nondestructive evaluation of carrier concentration in the channel layer of In 0.5 Ga 0.5 P/In 0.2 Ga 0.8 As/GaAs heterostructure field-effect transistors by Raman scattering A heterostructure field-effect transistor with an n ϩ -GaAs/p ϩ -InGaP/n-GaAs high-barrier gate and n-GaAs/i-InGaAs/i-GaAs/delta-doped sheet heterostructure channel ͑device A͒ has been successfully fabricated and studied. The heavily doped p ϩ -InGaP layer and heterostructure channel are introduced to increase the barrier height and carrier confinement, respectively. Experimentally, the device without the high-barrier gate structure ͑device B͒ is also fabricated for comparison to investigate the influence of high-barrier gate structure on device characteristics. Due to the high-barrier gate added to suppress the tunneling current in device A, the gate leakage current is also substantially reduced. Therefore, the turn-on voltage, breakdown voltage, current drivability, and transconductance linearity are all significantly improved for device A relative to device B. Furthermore, the temperature-dependent characteristics of device A are also improved.

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High temperature performance and operation of HFETs

Cited by 16 publications

References 9 publications

Evaluation of Electrical Characteristics of the Copper Metallized SPDT GaAs Switches at Elevated Temperatures

Evaluation of Electrical Characteristics of the Copper Metallized SPDT GaAs Switches at Elevated Temperatures

Spice Modeling of Compound Semiconductor Devices

Study of InGaP/GaAs/InGaAs high-barrier gate and heterostructure-channel field-effect transistors

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