High Throughput and Low Latency LZ4 Compressor on FPGA

Beneš, Tomáš; Bartík, Matěj; Kubalik, Pavel

doi:10.1109/reconfig48160.2019.8994794

Cited by 4 publications

(3 citation statements)

References 15 publications

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“…Several hardware architectures focused on maximizing the design throughput have been introduced in the past few years [1], [3], [4]. On the other hand, no current architecture has emphasized lowering an architecture overhead to reduce the respective architecture computation latency or resource utilization.…”

Section: Brief Motivation and Contributionsmentioning

confidence: 99%

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An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs

2020

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This paper presents a detailed analysis of various approaches to hardware implemented compression algorithm dictionaries, including our optimized method. To obtain comprehensive and detailed results, we introduced a method for the fair comparison of programmable hardware architectures to show the benefits of our approach from the perspective of logic resources, frequency, and latency. We compared two generally used methods with our optimized method, which was found to be more suitable for maintaining the memory content via (in)valid bits in any mid-density memory structures, which are implemented in programmable hardware such as FPGAs (Field Programmable Gate Array). The benefits of our new method based on a "Distributed Memory" technique are shown on a particular example of compression dictionary but the method is also suitable for another use cases requiring a fast (re-)initialization of the used memory structures before each run of an algorithm with minimum time and logic resources consumption. The performance evaluation of the respective approaches has been made in Xilinx ISE and Xilinx Vivado toolkits for the Virtex-7 FPGA family. However the proposed approach is compatible with 99% of modern FPGAs.

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Section: Brief Motivation and Contributionsmentioning

confidence: 99%

“…• The majority of designs are based on the LZ77 algorithm [33] or derived algorithms such as LZ78 [34] or LZW [35]. • The latest designs experiment with new derived algorithms focused on better compression ratio (LZMA [12]- [14], [36]) or speed (LZ4 [4], [31], [32], [37]).…”

Section: Theoretical Backgroundmentioning

confidence: 99%

An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs

2020

Self Cite

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“…The use of data compression in the field of high-performance computing has already been explored in several works [3,5]. Besides memory saving, the use of data compression can also be motivated by the need to transfer data between the CPU and the GPU efficiently.…”

Section: Introductionmentioning

confidence: 99%

Reducing the memory usage of Lattice-Boltzmann schemes with a DWT-based compression

Flint¹,

Helluy²

2023

Preprint

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This paper presents a new solution to address the challenge of increasing memory usage in high-performance computing simulations of Lattice-Bolzmann or Finite-Volume schemes. Our approach utilises a lossy compression scheme based on the Discrete Wavelet Transform (DWT) to achieve high compression ratios while preserving the accuracy of the simulation. Our evaluation on two different FV/LBM schemes demonstrates that the approach can reduce memory usage by several orders of magnitude.Résumé. Ce papier présente une nouvelle solution pour faire face à l'augmentation de l'utilisation de la mémoire dans les simulations haute performance basées sur les méthodes Lattice-Bolzmann ou Volumes Finis. Notre approche utilise un schéma de compression avec perte basé sur la transformée par ondelettes discrète (DWT) pour obtenir des taux de compression élevés tout en préservant la précision de la simulation. Notre évaluation sur deux différents schémas VF/LBM démontre que l'approche peut réduire l'utilisation de la mémoire de plusieurs ordres de grandeur.

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RtFog: A Real-Time FPGA-Based Fog Node With Remote Dynamically Reconfigurable Application Plane for Fog Analytics Redeployment

Tan

Ooi²,

Marsono

2022

IEEE Trans. on Green Commun. Netw.

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High Throughput and Low Latency LZ4 Compressor on FPGA

Cited by 4 publications

References 15 publications

An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs

An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs

Reducing the memory usage of Lattice-Boltzmann schemes with a DWT-based compression

RtFog: A Real-Time FPGA-Based Fog Node With Remote Dynamically Reconfigurable Application Plane for Fog Analytics Redeployment

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