High-Voltage Nanosecond Pulse Generator Using Series-Stacked Enhancement-Mode GaN Transistors

Briz, P.; Sarnago, H.; Burdío, J. M.; Lucía, O.

doi:10.1109/apec48139.2024.10509296

2024 IEEE Applied Power Electronics Conference and Exposition (APEC) 2024

DOI: 10.1109/apec48139.2024.10509296

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High-Voltage Nanosecond Pulse Generator Using Series-Stacked Enhancement-Mode GaN Transistors

P. Briz,

H. Sarnago,

J. M. Burdío

et al.

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2024

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Design Proposals for High-Voltage Stacked Configuration GaN Module

Frivaldsky,

Zelnik,

Spanik

2024

Electronics

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In this paper, the operational verification of the stacked transistor configuration is provided, focusing on the use of GaN transistors. The methodology is based on simulated and laboratory experiments. The stacked transistor configuration appears to be a promising solution to increase the voltage-blocking capability of GaN technology for high-voltage operations. Currently available GaN transistors are manufactured for 650 V of blocking voltage. Devices with a higher voltage-blocking capability are not currently available. Therefore, the stacked module was verified, while the main focus was on the driving circuit design, verification, and testing. For this purpose, two alternatives of GaN transistor technology have been compared. The main goal was to reach 800 V of blocking voltage with acceptable voltage deviation for nominal power of a power semiconductor converter.

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Design Proposals for High-Voltage Stacked Configuration GaN Module

Frivaldsky,

Zelnik,

Spanik

2024

Electronics

View full text Add to dashboard Cite

show abstract

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High-Voltage Nanosecond Pulse Generator Using Series-Stacked Enhancement-Mode GaN Transistors

Cited by 1 publication

References 25 publications

Design Proposals for High-Voltage Stacked Configuration GaN Module

Design Proposals for High-Voltage Stacked Configuration GaN Module

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