Highly linear robust RF switch with low insertion loss and high power handling capability in a 65nm CMOS technology

Rascher, Jochen; Pinarello, Sandro; Mueller, Jan-Erik; Fischer, Georg; Weigel, Robert

doi:10.1109/sirf.2012.6160157

Cited by 8 publications

(5 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To improve the power handling performance and reduce C shunt , V B must be driven with a negative bias larger than the DC offset voltage at V D2 node. by V B through R b improves the insertion loss and power handling performance [4,10,11], where the resistance of R B is 10 kΩ. The chip size is 0.51 × 0.78 mm 2 , including the DC and RF pads.…”

Section: Large-signal Operationmentioning

confidence: 99%

“…The centre frequency of the switch circuit was set to be 45 GHz by optimising the length of the transmission lines approximating to a λ /4 wavelength. The body bias driven by V B through R b improves the insertion loss and power handling performance [4, 10, 11], where the resistance of R B is 10 kΩ.…”

Section: Characteristic Of Dual‐gate Mosfet and Spdt Switch Designmentioning

confidence: 99%

“…A wideband switch circuit with low insertion loss and high isolation is necessary to switch the transmitted and received signals without reducing transmission quality. Owing to their advantages of low cost and high integration, switches using complementary metal‐oxide semiconductor (CMOS) technology are being developed beyond the microwave frequency range [3–10]. A switch design using travelling‐wave/distributed concept can further ameliorate the high‐frequency performance.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Broadband complementary metal‐oxide semiconductor single‐pole‐double‐throw switch with improved power handling capability using dual‐gate metal‐oxide semiconductor field‐effect transistors

Huang¹,

Hsin²

2015

IET Microwaves, Antennas & Propagation

View full text Add to dashboard Cite

A broadband complementary metal-oxide semiconductor (CMOS) single-pole-double-throw (SPDT) switch based on a travelling-wave design with using dual-gate N-type metal-oxide semiconductor (NMOS) transistors is implemented in a 0.18 μm CMOS process for millimetre-wave applications. To further investigate the power handling capability in a dual-gate metal-oxide semiconductor field-effect transistor (MOSFET), this study analyses the mechanism of voltage swing distribution by using the proposed large-signal cascode model. Considering the parasitic gate-to-gate capacitance and the substrate effect, the simulations in this study can accurately predict the small-signal and power handling performances of the SPDT switch. The switch exhibits a measured 1 dB bandwidth of ∼51 GHz, ranging from 16 to 67 GHz with an insertion loss of 3.6 dB at 30 GHz. The measured isolation is also better than 22 dB. The measured power handling capability can achieve a 1 dB compression point at an input power of 23.8 dBm at 30 GHz with a negative body bias, and the simulation result shows a 1 dB compression point nearly 24 dBm. Based on the proposed model, the large-signal performances under different body biases can be significantly predicted when including the parasitic gate-to-gate capacitance in a dual-gate MOSFET.

show abstract

Section: Large-signal Operationmentioning

confidence: 99%

Section: Characteristic Of Dual‐gate Mosfet and Spdt Switch Designmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Broadband complementary metal‐oxide semiconductor single‐pole‐double‐throw switch with improved power handling capability using dual‐gate metal‐oxide semiconductor field‐effect transistors

Huang¹,

Hsin²

2015

IET Microwaves, Antennas & Propagation

View full text Add to dashboard Cite

show abstract

“…Compared to the positive-intrinsic-negative (PIN) diode [5,6], micro-electro-mechanical systems (MEMS) [7,8], and gallium arsenide (GaAs) psuedomorphic high electron mobility transistor (pHEMT) [9,10], Silicon-oninsulator (SOI) CMOS process shares the important features of being fast, reliable, and highly integratable, and thus, becomes a preferred choice for switch applications [11,12,13,14]. The low break-down voltage and conductive substrate limit the standard bulk CMOS for RF switch applications [15,16,17]. In a partially-deleted (PD) technology [18], both floating body (FB) and body contacted (BC) FETs are offered [19].…”

Section: Introductionmentioning

confidence: 99%

A low-loss high-linearity SOI SP6T antenna switch using diode biasing method

Abdo

Ling

Chen

2019

IEICE Electron. Express

View full text Add to dashboard Cite

This letter describes a single-pole six-throw (SP6T) antenna switch in a 180 nm silicon-on-insulator (SOI) CMOS technology for receive diversity and LTE transmit/receive applications. Using a new diode biasing method, the conventional biasing resistor and supply voltage are removed at the body of the stacked-FET switch, a diode is used to connect the body and gate for body bias instead. The biasing diode turns off and on and functions as a high and small resistor for the on and off state. The proposed design helps to achieve low loss and high linearity. The measured insertion loss (IL) at 0.9 and 1.9 GHz are roughly 0.29 and 0.46 dB, respectively. The switch shows a second harmonic of −86 and −83 dBc, and third harmonic power of −94 and −87 dBc with a +26 dBm input power at 0.9 and 1.9 GHz, respectively.

show abstract

“…2 illustrates the MOSFET switch used for (a) to (e) as shown in Fig. 1, which can be composed of general switches [2,3]. They are turned on and off by toggling the voltage of the SW in Fig.…”

Section: Introductionmentioning

confidence: 99%

High-Isolation SPDT RF Switch Using Inductive Switching and Leakage Signal Cancellation

Ha¹,

Cho²

2014

Journal of electromagnetic engineering and science

View full text Add to dashboard Cite

A switch is one of the most useful circuits for controlling the path of signal transmission. It can be added to digital circuits to create a kind of gate-level device and it can also save information into memory. In RF subsystems, a switch is used in a different way than its general role in digital circuits. The most important characteristic to consider when designing an RF switch is keeping the isolation as high as possible while also keeping insertion loss as low as possible. For high isolation, we propose leakage signal cancellation and inductive switching for designing a singlepole double-throw (SPDT) RF switch. By using the proposed method, an isolation level of more than 23 dB can be achieved. Furthermore, the heterojunction bipolar transistor (HBT) process is used in the RF switch design to keep the insertion loss low. It is demonstrated that the proposed RF switch has an insertion loss of less than 2 dB. The RF switch operates from 1 to 8 GHz based on the 0.18-μm SiGe HBT process, taking up an area of 0.3 mm This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/ by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited. ⓒ

show abstract

Highly linear robust RF switch with low insertion loss and high power handling capability in a 65nm CMOS technology

Cited by 8 publications

References 5 publications

Broadband complementary metal‐oxide semiconductor single‐pole‐double‐throw switch with improved power handling capability using dual‐gate metal‐oxide semiconductor field‐effect transistors

Broadband complementary metal‐oxide semiconductor single‐pole‐double‐throw switch with improved power handling capability using dual‐gate metal‐oxide semiconductor field‐effect transistors

A low-loss high-linearity SOI SP6T antenna switch using diode biasing method

High-Isolation SPDT RF Switch Using Inductive Switching and Leakage Signal Cancellation

Contact Info

Product

Resources

About