Highly manufacturable high density phase change memory of 64Mb and beyond

Ahn, Sung Woo; Song, Y. J.; Jeong, Changwook; Shin, Jaekyung; Fai, Y.; Hwang, Y.N.; Lee, S.H.; Ryoo, Kyung−Chang; Lee, S.Y.; Park, Jai Hyung; Hasegawa, Hideki; Ha, Yeong-Ho; Yi, Ji Soo; Kuh, Bong Jin; Koh, G.H.; Jeong, Gitae; Jeong, Hyemin; Kim, Kinam; Ryu, Byung-Il

doi:10.1109/iedm.2004.1419329

Cited by 52 publications

(31 citation statements)

References 2 publications

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“…In this paper, we call applications leveraging BANVMs to manipulate persistent data as persistent applications, and those using BA-NVMs solely as working memory as non-persistent applications. 2 Most prior work focused on designing memory systems to accommodate either type of applications, persistent or non-persistent. Strikingly little attention has been paid to study the cases when these two types of applications concurrently run in a system.…”

Section: Introductionmentioning

confidence: 99%

FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems

Zhao

Mutlu²,

Xie

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

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Abstract-Byte-addressable nonvolatile memories promise a new technology, persistent memory, which incorporates desirable attributes from both traditional main memory (byte-addressability and fast interface) and traditional storage (data persistence). To support data persistence, a persistent memory system requires sophisticated data duplication and ordering control for write requests. As a result, applications that manipulate persistent memory (persistent applications) have very different memory access characteristics than traditional (non-persistent) applications, as shown in this paper. Persistent applications introduce heavy write traffic to contiguous memory regions at a memory channel, which cannot concurrently service read and write requests, leading to memory bandwidth underutilization due to low bank-level parallelism, frequent write queue drains, and frequent bus turnarounds between reads and writes. These characteristics undermine the high-performance and fairness offered by conventional memory scheduling schemes designed for non-persistent applications.Our goal in this paper is to design a fair and high-performance memory control scheme for a persistent memory based system that runs both persistent and non-persistent applications. Our proposal, FIRM, consists of three key ideas. First, FIRM categorizes request sources as non-intensive, streaming, random and persistent, and forms batches of requests for each source. Second, FIRM strides persistent memory updates across multiple banks, thereby improving bank-level parallelism and hence memory bandwidth utilization of persistent memory accesses. Third, FIRM schedules read and write request batches from different sources in a manner that minimizes bus turnarounds and write queue drains. Our detailed evaluations show that, compared to five previous memory scheduler designs, FIRM provides significantly higher system performance and fairness.

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Section: Introductionmentioning

confidence: 99%

FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems

Zhao

Mutlu²,

Xie

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

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“…Various technology options for access devices have been demonstrated, including diodes, field-effect transistors, and bipolar junction transistors. In addition, novel devices such as the surrounding-gate transistor and the FinFET have also been developed [36][37][38][39][40]. These devices are fabricated on a Si substrate and are called (front-end-of-line) FEOL devices.…”

Section: Cell Structure: Access Devicementioning

confidence: 99%

Phase change memory

Lam

2011

Sci. China Inf. Sci.

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Phase change memory (PCM) is a non-volatile solid-state memory technology based on the large resistivity contrast between the amorphous and crystalline states in phase change materials. We present the physics behind this large resistivity contrast and describe how it is being exploited to create high density PCM. We address the challenges facing this technology, including the design of PCM cells, fabrication, device variability, thermal cross-talk and write disturb. We discuss the scalability, assess the performance, and examine the reliability of PCM including data retention, multi-bit storage and endurance.

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“…They can switch from a high to a low resistance state and can be therefore used as a solid-state memory. The principle of a chalcogenide RAM memory was first proposed by Dewald in 1962 [4]; however, only in the early 2000s semiconductor industries have considered the exploitation of the same concept for large-size solid-state memories [5][6][7][8][9]. Today PCMs are considered a promising candidate to eventually become the mainstream non-volatile technology due to their large cycling endurance [10][11][12], fast program and access times and extended scalability [13].…”

Section: Introductionmentioning

confidence: 99%