Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation

Lee, J.I.; Park, H.; Cho, S.L.; Park, Y.L.; Bae, Byoung-Jae; Park, Jai Hyung; Park, J.S.; An, Hyeong-Geun; Bae, Jae Hyun; Ahn, Donghwan; Kim, Y.T.; Hasegawa, Hideki; Song, Seung Hoon; Shin, Jaeseung; Park, S.O.; Kim, H.S.; Chung, U‐In; Moon, Joo-Tae; Ryu, Byung-Il

doi:10.1109/vlsit.2007.4339744

Cited by 49 publications

(36 citation statements)

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“…Alternative deposition methods have been developed to address this issue [67]. They include chemical vapor deposition (CVD) [63], electrodeposition [68], solution-phase deposition [69], the application of bottom-up nano-materials [42], and atomic layer deposition [70]. Among those methods atomic layer deposition (ALD) is particularly promising for ultra-scaled devices, because it allows for deposition with atomic layer control of thickness and composition and very high conformality.…”

Section: Pcram Cell Design and Optimizationmentioning

confidence: 99%

Pcram

Raoux¹,

Ritala

2013

Atomic Layer Deposition for Semiconductors

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Section: Pcram Cell Design and Optimizationmentioning

confidence: 99%

Pcram

Raoux¹,

Ritala

2013

Atomic Layer Deposition for Semiconductors

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“…Although sputter deposition is the most widely used approach to form different material compositions, it has difficulty in filling such a high-aspect ratio hole [30]. Consequently, alternative approaches such as CVD and atomic layer deposition (ALD) have been investigated by a number of research groups [42,43]. These techniques have shown their effectiveness in improving device yield and performance, but still require further efforts achieve further scaling.…”

Section: Process Integrationmentioning

confidence: 99%

“…However, to optimize cell dimensions for low RESET currents, non-isotropic scaling is desirable. To make the optimal trade-off, a mixed scaling rule that decreases both the lateral and vertical dimensions properly not only leads to reduced RESET power, but also reduces thermal cross talk risk dramatically [43].…”

Section: Pcm Reliabilitymentioning

confidence: 99%

Phase change memory

Lam

2011

Sci. China Inf. Sci.

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Phase change memory (PCM) is a non-volatile solid-state memory technology based on the large resistivity contrast between the amorphous and crystalline states in phase change materials. We present the physics behind this large resistivity contrast and describe how it is being exploited to create high density PCM. We address the challenges facing this technology, including the design of PCM cells, fabrication, device variability, thermal cross-talk and write disturb. We discuss the scalability, assess the performance, and examine the reliability of PCM including data retention, multi-bit storage and endurance.

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“…Pushing down the size of the PCM cells to nano-scale reduces the active material volumes being programmed, so that shorter and less intense current pulses are required, as already demonstrated in previous studies, where the NW synthesis was carried out by a bottom up approach (metal-catalyzed Vapor-Liquid-Solid, VLS, mechanism) coupled to vapor transport deposition in tube furnaces [6][7][8][9][10][11]. An advanced deposition technique like MOCVD has in principle several advantages, in particular better process control and possibility of industrial scaling for PCM [12,13]. Therefore in this study we investigated the feasibility of MOCVD synthesis of GeTe NWs, studying the effects of growth conditions and of the Au-catalyst on structural and compositional properties of the obtained NWs.…”

Section: Introductionmentioning

confidence: 99%