Highly secured chaotic block cipher for fast image encryption

Fouda, J.S. Armand Eyebe; Effa, Joseph Yves; Ali, Maaruf

doi:10.1016/j.asoc.2014.08.059

Cited by 19 publications

(1 citation statement)

References 29 publications

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“…The inherently correlation between chaos and cryptography [Kocarev & Lian, 2011] inspires researchers to combine cryptography with chaos. Many chaotic cryptographic algorithms have been proposed [Luo et al, 2016;Liu et al, 2016;Chen et al, 2004;Eyebe Fouda et al, 2014;Elgendy et al, 2016].…”

Section: Introductionmentioning

confidence: 99%

Cryptanalysis of Chaos-Based Cryptosystem from the Hardware Perspective

Luo

Zhang

Liu

et al. 2018

Int. J. Bifurcation Chaos

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Chaos has been used in cryptography for years and many chaotic cryptographic systems have been proposed. Their securities are often evaluated by conducting conventional statistical tests, however few studies have referred to the security issue of the chaotic hardware cryptographic systems. This paper evaluates the security of the chaotic cryptographic system from a hardware perspective by using the side channel analysis attack. First, a chaotic block cryptosystem is designed and implemented based on an Atmel microcontroller. Then the conventional statistical security tests, including SP 800-22 test, characters frequency test, avalanche test, are used to verify its security performance. In the meantime, the correlation power analysis attack is carried out for the security evaluation. Experimental results demonstrate that even though the chaotic cryptographic system can pass the conventional statistical tests, it still has the probability to be attacked from a hardware perspective using the leaked side channel information such as execution time and power consumption. This paper proposes another way to analyze the security of the chaotic cryptosystem, which can aid designing mechanisms to enhance the security of the hardware cryptosystems in the future.

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