HiRA: A methodology for deadlock free routing in hierarchical networks on chip

Abstract

Abstract-Complexity of designing large and complex NoCs can be reduced/managed by using the concept of hierarchical networks. In this paper, we propose a methodology for design of deadlock free routing algorithms for hierarchical networks, by combining routing algorithms of component subnets. Specifically, our methodology ensures reachability and deadlock freedom for the complete network if routing algorithms for subnets are deadlock free. We evaluate and compare the performance of hierarchical routing algorithms designed using our methodology with routing algorithms for corresponding flat networks. We show that hierarchical routing, combining best routing algorithm for each subnet, has a potential for providing better performance than using any single routing algorithm. This is observed for both synthetic as well as traffic from real applications. We also demonstrate, by measuring jitter in throughput, that hierarchical routing algorithms leads to smoother flow of network traffic. A router architecture that supports scalable table-based routing is briefly outlined.

Hot-Spot Traffic Pattern on Hierarchical 3D Mesh Network

“…This process is repeated until the packet arrives at its final destination [15]. Routing at the higher level H3DM is performed first in the -direction and then in thedirection.…”

A scalable and fault-tolerant network routing scheme for many-core and multi-chip systems

“…DR-VCT then conditionally selects output ports in the same x or y dimension (i.e., non-minimal routing paths) to spread traffic flows evenly. When a new network is interconnected to the existing one, it is required to re-map all router addresses to a flat network as proposed in HiRA [16]. Then, every router location in the combined network can be recognized by DR-VCT.…”

“…The reason is that the Segment-based Routing scheme required computing the segment-based routing tables as implemented in [24]; and the table-based implementation could have a non-scalable routing algorithm for hierarchical networks [16].…”

“…To deal with the deadlock free issue in a hierarchical network, Holsmark et al [16] proposed a methodology, namely Hierarchical Routing Algorithms (HiRA), by combining topology-aware 0743-7315/$ -see front matter © 2012 Elsevier Inc. All rights reserved. routing algorithms of individual networks.…”

Hybrid on-chip interconnection with coupled cores in tiles

“…Each router was reconfigured according to the traffic requirements. A hierarchical on-chip network structure was described in [11]. The whole network was divided into different sub-networks as the levels.…”