Hold-up time extension Circuit with integrated magnetics

Jang, Yungtaek; Jovanovic, M.M.; Dillman, David L.

doi:10.1109/tpel.2005.869750

Cited by 54 publications

(14 citation statements)

References 2 publications

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“…This means the interactions among the converters are strong and the input voltage and the load range are limited. These problems result in an increase in the input capacitance to satisfy the hold-up requirement [4].…”

Section: Operating Principle Of the Proposed Pfm-pwm-pd Methodsmentioning

confidence: 99%

A Tightly Regulated Triple Output Asymmetrical Half Bridge Flyback Converter

Hyeon¹,

Cho²

2010

Journal of Power Electronics

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In this paper, a tightly regulated triple output asymmetrical half bridge flyback (ASHF) converter is proposed. In order to regulate all output voltages, pulse frequency modulation (PFM), pulse width modulation (PWM) and phase delay (PD) are used simultaneously. In comparison with the conventional PWM-PD method, the interactions among the control variables are minimized and the operating range is increased. By the utilization of a multi winding transformer, the auxiliary transformer and the blocking capacitor are eliminated and the size and cost of the proposed converter is reduced. The operation principle of the converter is explained and the modes of operation are investigated. Based on the results, the steady state characteristics of the converter are explored. A 24V/10A, 12V/5A, 5V/10A hardware prototype is built and tested to verify the analysis results and the voltage regulation of the triple outputs of the proposed converter.

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Section: Operating Principle Of the Proposed Pfm-pwm-pd Methodsmentioning

confidence: 99%

A Tightly Regulated Triple Output Asymmetrical Half Bridge Flyback Converter

Hyeon¹,

Cho²

2010

Journal of Power Electronics

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“…In specific applications, a hold-up time is needed [1], [2]. During hold-up time, a dc-dc converter is powered by the link capacitor of a PFC converter, discharging normally from 400 to about 300 V. This voltage range can be changed according to the link capacitor and the design [1], [2]. Because a dc-dc converter normally works under a nominal high input voltage of 400 V, the performance of the higher input voltage is more important than that of the lower input voltage.…”

Section: Introductionmentioning

confidence: 99%

“…Although the methods proposed in [2], [8], and [9] can help the hold-up time problem of LLC resonant converter, these methods require additional components in power stage. This can decrease the power density.…”

Section: Introductionmentioning

confidence: 99%

Asymmetric PWM Control Scheme During Hold-Up Time for $LLC$ Resonant Converter

Kim

Park

Moon

2012

IEEE Trans. Ind. Electron.

137

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To narrow down the switching-frequency-variation range of an LLC resonant converter, asymmetric pulsewidth modulation (APWM) of the hold-up time is proposed. During the hold-up time, the modulation method of an LLC resonant converter is changed from frequency modulation (FM) to APWM. Since the LLC resonant converter achieves a higher gain with APWM than it does with FM at the same switching frequency, the switching-frequency-variation range is reduced. Therefore, an optimal design of the magnetic components is possible, resulting in a high efficiency under normal operation and a high power density. The proposed control scheme is applied to an 85-W LLC resonant converter.

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“…On one hand, the impact of the added active filters on the hold-up function of the dc-link is not discussed in [4]- [10]. On the other hand, it is crucial to provide the design guideline for the applications requiring hold-up function [11]. Accordingly, the hold-up time analysis and the trade-off design conditions of the dc-link module are discussed and experimentally verified in the following sections.…”

Section: Introductionmentioning

confidence: 99%