III–V semiconductors possess high mobility, high frequency response, and detection sensitivity, making them potentially attractive for beyond‐silicon electronics applications. However, the traditional heteroepitaxy of III–V semiconductors is impeded by a significant lattice mismatch and the necessity for extreme vacuum and high temperature conditions due to the low saturated vapor pressures of their constituent metals, thereby impeding their in situ compatibility with flexible substrates and silicon‐based circuits. In this study, we present a novel approach to fabricate ultrathin InSb single‐crystal nanosheets on arbitrary substrates with a thickness as thin as 2.4 nm using low‐thermal‐budget Van der Waals (vdW) epitaxy through chemical vapor deposition (CVD). In particular, we have successfully achieved in‐situ growth on both silicon‐based substrates and flexible polyimide substrates. Notably, the growth temperature required for InSb nanosheets (240 °C) is significantly lower than that employed in back‐end‐of‐line processes (400 °C). The field effect transistor (FET) devices based on fabricated ultrathin InSb nanosheets exhibit ultra‐high On‐off ratio exceeding 108 and demonstrate minimal gate leakage currents. Furthermore, these ultrathin InSb nanosheet display p‐type characteristics with hole mobilities reaching up to 203 cm2v−1s−1 at room temperatures. This study paves the way for achieving heterogeneous integration of III–V semiconductors, ensuring compatibility with existing integrated circuit architecture and facilitating their application in flexible electronics, thereby realizing the potential of III–V nanometer‐scale logic transistors.This article is protected by copyright. All rights reserved