2010 European Dependable Computing Conference 2010
DOI: 10.1109/edcc.2010.35
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How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining

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Cited by 8 publications
(10 citation statements)
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“…Note the above equalities do not affect this system and can be resolved iteratively once the other variables are fixed. We observe that the right hand side of Inequality (13) is increasing in T 5 , the right hand side of Inequality (15) is increasing in T 3 , and neither T 3 nor T 5 are present in any further inequalities. Hence, we rule that Inequality (14) and Inequality (15) shall be satisfied with equality, i.e.,…”
Section: Timeout Constraintsmentioning
confidence: 76%
See 1 more Smart Citation
“…Note the above equalities do not affect this system and can be resolved iteratively once the other variables are fixed. We observe that the right hand side of Inequality (13) is increasing in T 5 , the right hand side of Inequality (15) is increasing in T 3 , and neither T 3 nor T 5 are present in any further inequalities. Hence, we rule that Inequality (14) and Inequality (15) shall be satisfied with equality, i.e.,…”
Section: Timeout Constraintsmentioning
confidence: 76%
“…This is expressed by the rather involved transition rule tr(recover, join): T 6 is much smaller than T 7 , but T 6 is of no concern until the node switches to state active and resets T 6 . 15 It remains to explain how nodes agree on resynchronization points.…”
Section: Main Algorithmmentioning
confidence: 99%
“…Note that (i) provides smoother clocks but requires lowjitter input clocks (guaranteed by HEX at least for static crash failures). Alternatively, (iii) pipelining of ticks as in [9] could be used. This would avoid the need for sleeping times and tick separation, but requires additional hardware for locally counting ticks and a considerably more involved self-stabilization analysis.…”
Section: Discussionmentioning
confidence: 99%
“…The only fault-tolerant clock generation approaches for multi-synchronous GALS systems known to us are the Byzantine fault-tolerant DARTS approach [9,10] and our selfstabilizing Byzantine fault-tolerant FATAL algorithm proposed in [5]. However, both approaches are complex and require a fully-connected interconnect topology.…”
Section: Introductionmentioning
confidence: 99%
“…For example, traditional clock synchronization [52] built upon the approximate agreement [11] supports sparse resource occupation, but it does not achieve full temporal BFT and may need a lot of rounds for worst-case convergence even in synchronous systems with unbounded clocks. And the clock synchronization solutions [53,65,66] based on simulating the broadcast primitive [60] lack the temporal BFT, too. Other integrated synchronization schemes, such as [67,68,69], still compromise with limited spatial or temporal BFT.…”
Section: Related Workmentioning
confidence: 99%