Hybrid density functional analysis of distribution of carbon-related defect levels at 4H-SiC(0001)/SiO₂ interface

Abstract

Silicon carbide (SiC)-based metal-oxide-semiconductor devices suffer from carrier mobility degradation due to defects at the SiC/SiO 2 interface. The carbon-related defects Si 2 >C=O and Si 2 >C=C<Si 2 are thought to be possible origins of the defect levels. We studied the electronic structures of 4H-SiC(0001)/SiO 2 interfaces with C=O and C=C defects by first-principles calculations based on hybrid density functional theory. We found that their defect levels are strongly affected by the local structures around the C=O and C=C groups, and the defect levels form a broad state distribution.

High-temperature CO2 treatment for improving electrical characteristics of 4H-SiC(0001) metal-oxide-semiconductor devices

“…Theoretical studies suggest the cause to be residual carbon-related defects near the SiO 2 /SiC interface. [3][4][5][6][7][8][9] Carbon dangling-bond centers at a thermally grown SiO 2 /SiC interface has been detected by electron spin resonance and electrically detected-magnetic-resonance. [10][11][12] It has also reported that carbon atom diffusion from the SiO 2 /SiC interface toward the overlying SiO 2 surface occurs when high-temperature Ar annealing is performed on thermally grown SiO 2 /SiC structures, suggesting that excessive C atoms remain at the interface just after thermal oxidation.…”

Impact of post-nitridation annealing in CO2 ambient on threshold voltage stability in 4H-SiC metal-oxide-semiconductor field-effect transistors

“…Both issues are closely related to the quality of the MOS interface. It has been suggested that several kinds of defects, including carbon-related defects [3][4][5][6][7][8][9][10][11][12] and oxygen vacancies, 3,8,13) are generated near the SiO 2 /SiC interface after thermal oxidation. Post-oxidation annealing (POA) in a NO ambient is widely used to improve the SiO 2 /SiC interface properties.…”

Demonstration of 4H-SiC CMOS circuits consisting of well-balanced n- and p-channel MOSFETs fabricated by ultrahigh-temperature gate oxidation

“…Although the physical origins of MOS interface defects have not yet been fully clarified, it is known that electrical defects accumulate at the SiO 2 /SiC interface with the progress of thermal oxidation 17,18) and carbon-related defects are the most likely candidate for the dominant interface states near both the conduction and valence band edges of SiC. [19][20][21] So far, aiming at development of high-efficiency n-channel SiC MOSFETs, intensive research has been conducted to reduce the interface state density (D it ) near the conduction band edge of 4H-SiC. Various techniques, such as nitridation of the SiO 2 /SiC interface, [22][23][24][25] high-temperature hydrogen annealing, 26,27) and incorporation of phosphorus 28) and alkaline earth metals in the interface, 29,30) have been investigated as ways of enhancing the performance of n-channel devices.…”