Hybrid-Mode Floating-Point FPGA CORDIC Co-processor

Zhou, Jie; Dou, Yong; Lei, Yuanwu; Yu, De Quan

doi:10.1007/978-3-540-78610-8_25

Cited by 3 publications

(1 citation statement)

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“…The main powerful characteristic of the CORDIC algorithm is the capability to implement several trigonometric function [16], [15], phase and magnitude functions [17], and hyperbolic functions [18] as well as linear operational function such as multiplication and division functions. By using CORDIC algorithms, we can also easily implement all the function in a single CORDIC hardware architecture [19]. Some basic standard and non-standard operators such as sum-of-product and product-of-sum [20], which can be used to accelerate floating-point operations, can also be implemented by using CORDIC algorithm.…”

Section: Taylor's Series Expansion Algorithmmentioning

confidence: 99%

Floating-Point Division Operator based on CORDIC Algorithm

Surapong

Samman

1970

ECTI-CIT

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Design and evaluation of a CORDIC (COordinate Rotation DIgital Computer) algorithm for a floatingpoint division operation is presented in this paper. In general, division operation based on CORDIC algorithm has a limitation in term of the range of inputs that can be processed by the CORDIC machine to give proper convergence and precise division operation result. A hardware architecture of CORDIC algorithm capable of processing broader input ranges is implemented and presented in this paper by using a pre-processing and a post-processing stage. The performance as well as the calculation error statistics over exhaustive sets of input tests are evaluated. The results show that the CORDIC algorithm can be well-convergence and gives precise division operation results with broader input ranges. The proposed hardware architecture is modeled in VHDL and synthesized on a CMOS standard-cell technology and a FPGA device, resulting 1 GFlops on the CMOS and 210.812 MFlops on the FPGA device.

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