HyDe: A Hybrid PCM/FeFET/SRAM Device-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms

Bhattacharjee, Abhiroop; Moitra, Abhishek; Panda, Priyadarshini

doi:10.1109/jetcas.2023.3327748

IEEE J. Emerg. Sel. Topics Circuits Syst.

2023

DOI: 10.1109/jetcas.2023.3327748

|View full text |Cite

HyDe: A Hybrid PCM/FeFET/SRAM Device-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms

Abhiroop Bhattacharjee,

Abhishek Moitra,

Priyadarshini Panda

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2024

Publication Types

Select...

Article2

Relationship

Self Cite0

Independent2

Authors

Journals

Cited by 2 publications

References 40 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design

Moitra,

Bhattacharjee,

et al. 2024

Applied Physics Reviews

View full text Add to dashboard Cite

This review explores the intersection of bio-plausible artificial intelligence in the form of spiking neural networks (SNNs) with the analog in-memory computing (IMC) domain, highlighting their collective potential for low-power edge computing environments. Through detailed investigation at the device, circuit, and system levels, we highlight the pivotal synergies between SNNs and IMC architectures. Additionally, we emphasize the critical need for comprehensive system-level analyses, considering the inter-dependencies among algorithms, devices, circuit, and system parameters, crucial for optimal performance. An in-depth analysis leads to the identification of key system-level bottlenecks arising from device limitations, which can be addressed using SNN-specific algorithm–hardware co-design techniques. This review underscores the imperative for holistic device to system design-space co-exploration, highlighting the critical aspects of hardware and algorithm research endeavors for low-power neuromorphic solutions.

show abstract

When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design

Moitra,

Bhattacharjee,

et al. 2024

Applied Physics Reviews

View full text Add to dashboard Cite

show abstract

HuNT: Exploiting Heterogeneous PIM Devices to Design a 3-D Manycore Architecture for DNN Training

Ogbogu,

Narang,

Joardar

et al. 2024

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

HyDe: A Hybrid PCM/FeFET/SRAM Device-Search for Optimizing Area and Energy-Efficiencies in Analog IMC Platforms

Cited by 2 publications

References 40 publications

When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design

When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design

HuNT: Exploiting Heterogeneous PIM Devices to Design a 3-D Manycore Architecture for DNN Training

Contact Info

Product

Resources

About