Hysteretic threshold logic and quasi-delay insensitive asynchronous design

Abstract

We introduce the class of hysteretic linear-threshold (HLT) logic functions as a novel extension of linear threshold logic, and prove their general applicability for constructing state-holding Boolean functions. We then demonstrate a fusion of HLT logic with the quasi-delay insensitive style of asynchronous circuit design, complete with logical design examples. Future research directions are also identified.

Extended Boolean algebra for asynchronous quasi‐delay‐insensitive logic

“…Furthermore, it is also realised that while AND and OR operations are in a duality relationship with each other, the completion operator is dual of itself. This could be easily noticed via (6)- (16) as well as in DeMorgan's law for completion (Law 4) where completion operators are identical between dual identities.…”

“…For example, in Law 5, (6) and (8) are dual of (7) and (9), respectively. Similarly, in Law 6, (10) and (11) are the dual of each other, and the same for (12) and (13) as well as (15) and (16). Finally, 14is dual of itself because it is symmetric with regard to AND and OR operations.…”

“…Note that, the term ‘ hysteresis ’, also referred to as ‘ state holding behaviour ’, means that the function's output remains at its previous value when the set of input values does not satisfy the set/reset condition of the function. With that meaning, the word ‘ hysteretic ’ (adjective) is also used in many documents, such as in [13, 16]. In general, a hysteretic function is a function that its output will be set to 1 in some particular cases and reset to 0 in some other cases, otherwise, it remains as the previous value.…”

“…Previously, threshold gates with hysteresis (NCL and NCL+) can be only described implicitly by set and reset functions [2, 20] or by their transitions with up and down arrows [16]. However, with extended Boolean algebra, all NCL and NCL+ gates now can be explicitly represented in Table 7.…”

“…The authors in [16] present a theoretical paradigm that is said to be a generalisation of hysteretic threshold logic‐based QDI templates. However, in that work, threshold gates are still implicitly described by their transitions with up and down arrows.…”