2020
DOI: 10.1039/d0na00223b
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In situ TEM observation of void formation and migration in phase change memory devices with confined nanoscale Ge2Sb2Te5

Abstract: Void formation and migration that drive the device failure of Ge2Sb2Te5 (GST)-based practical devices were revealed via in situ TEM.

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Cited by 25 publications
(14 citation statements)
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“…Oh et al observed the void formation in PCM devices using transmission electron microscopy (TEM) and the initial void location coincides with the maximum stress location. [ 17 ] In the HBW, the maximum stress was located at the edges of the heater near the GST/heater interface, which is consistent with the experimentally observed failure. [ 16 ] To make matters worse, the maximum stress location is also the maximum current density location.…”
Section: Materials Thermal Conductivity [W M−1 K−1] Electrical Conductivity [S M−1] Density [Kg M−3] Specific Heat [J Kg−1 K−1] Young's Msupporting
confidence: 82%
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“…Oh et al observed the void formation in PCM devices using transmission electron microscopy (TEM) and the initial void location coincides with the maximum stress location. [ 17 ] In the HBW, the maximum stress was located at the edges of the heater near the GST/heater interface, which is consistent with the experimentally observed failure. [ 16 ] To make matters worse, the maximum stress location is also the maximum current density location.…”
Section: Materials Thermal Conductivity [W M−1 K−1] Electrical Conductivity [S M−1] Density [Kg M−3] Specific Heat [J Kg−1 K−1] Young's Msupporting
confidence: 82%
“…[ 11–14 ] The stuck reset can be attributed to the failure of the GST/heater interface due to void formation or delamination, which mostly occurs at the GST/other material interface. [ 14–17 ] Delamination is an interfacial fracture and may be affected by the mechanical stress. In general, void formation in integrated circuits is the result of electromigration (EM).…”
Section: Materials Thermal Conductivity [W M−1 K−1] Electrical Conductmentioning
confidence: 99%
“…To explore the effects of this single-variant CuPt B ordering and APDBs on the electrical properties of the material, in situ biasing TEM electrical measurements were performed to analyze the difference on conductivity along specific directions at the nanoscale. For these measurements, a new set of samples was prepared by FIB. Figure shows the schematic of the TEM-STM holder, where a sharp platinum tip was attached to the movable part of the STM holder, and both the GaInP samples and the STM tip were oriented perpendicular to the electron beam. , As can be seen in the figure, the protective Pt layer grown during FIB preparation was also etched by FIB in order to cut the Pt metallic path forcing the current to flow through the GaInP layer (see Figure S2b). During the measurements, the movable tip of the TEM-STM holder was positioned to contact directly on the GaInP:Sb layer to perform the electrical measurements solely through the GaInP layer.…”
Section: Resultsmentioning
confidence: 99%
“…The bimodal feature of the charges of indium atoms is consistent with previous work [50], stemming from different local environments of indium atoms. The enlarged charge transfer in amorphous structures increases the probability of long-distance electromigration under the transient electrical field induced by programming pulses [88], which is detrimental to the cycling endurance of devices [89,90]. For RESET operations, the higher the melting temperature T m , the greater the power consumption.…”
Section: Resultsmentioning
confidence: 99%