IA-32 execution layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium/spl reg/-based systems

Baraz, L.; Devor, Tevi; Etzion, O.; Goldenberg, S.; Skaletsky, Alex; Wang, Yun; Zemach, Y.

doi:10.1109/micro.2003.1253195

Cited by 101 publications

(104 citation statements)

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“…IA-32 EL [4] and HP Aries [26] both supported the transition to the IA-64 architecture from x86 and PA-RISC respectively. FX!32 [9,17] was similarly used to help migrate x86 applications to the Alpha architecture.…”

Section: Related Workmentioning

confidence: 84%

“…While correct, this approach has two significant downsides: not only does it double the translated code size for what is a very common instruction, which impacts memory overhead and instruction cache locality, it also requires a data-dependent addition cycle before each load or store instruction 4 . Note that the same problem also applies to immediateoffset loads and stores: adding an immediate value (up to ±4095 bytes) from a 32-bit base address can still overflow or underflow the 32-bit address space.…”

Section: Speculative Address Generationmentioning

confidence: 99%

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Low overhead dynamic binary translation on ARM

et al. 2017

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The ARMv8 architecture introduced AArch64, a 64-bit execution mode with a new instruction set, while retaining binary compatibility with previous versions of the ARM architecture through AArch32, a 32-bit execution mode. Most hardware implementations of ARMv8 processors support both AArch32 and AArch64, which comes at a cost in hardware complexity.We present MAMBO-X64, a dynamic binary translator for Linux which executes 32-bit ARM binaries using only the AArch64 instruction set. We have evaluated the performance of MAMBO-X64 on three existing ARMv8 processors which support both AArch32 and AArch64 instruction sets. The performance was measured by comparing the running time of 32-bit benchmarks running under MAMBO-X64 with the same benchmark running natively. On SPEC CPU2006, we achieve a geometric mean overhead of less than 7.5 % on in-order Cortex-A53 processors and a performance improvement of 1 % on out-of-order X-Gene 1 processors.MAMBO-X64 achieves such low overhead by novel optimizations to map AArch32 floating-point registers to AArch64 registers dynamically, handle overflowing address calculations efficiently, generate traces that harness hardware return address prediction, and handle operating system signals accurately.

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Section: Related Workmentioning

confidence: 84%

Section: Speculative Address Generationmentioning

confidence: 99%

Low overhead dynamic binary translation on ARM

et al. 2017

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“…Many binary translators specialize in migrating the binary from one architecture to another. IA-32EL [4] translates IA-32 code to IA-64 code. There are also some binary translators which perform same ISA translation to help in virtualization, as in the case of VMware GSX, and in optimization, as in the case of Dynamo [3] and Adore [20].…”

Section: Dynamic Binary Optimizationmentioning

confidence: 99%

Dynamic Data Shapers Optimize Performance in Dynamic Binary Optimization (DBO) Environment

Venkatesan

Ponpandi

Tyagi

2015

2015 IEEE International Symposium on Nanoelectronic and Information Systems

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“…They include Aries [46] for PA-RISC to IA-64, Walkabout [15] for IA-32 to SPARC, IA32 EL [3] for IA-32 to IA-64, Dynamite [35] for IA-32 to MIPS, and many others including QEMU [5] and HDTrans [36]. Having different host and guest architectures, dynamic translation faces some cross target execution challenges that dynamic instrumentation does not have.…”

Section: Related Workmentioning

confidence: 99%

Transparent dynamic instrumentation

Bruening

Zhao

Amarasinghe

2012

Proceedings of the 8th ACM SIGPLAN/SIGOPS Conference on Virtual Execution Environments

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Process virtualization provides a virtual execution environment within which an unmodified application can be monitored and controlled while it executes. The provided layer of control can be used for purposes ranging from sandboxing to compatibility to profiling. The additional operations required for this layer are performed clandestinely alongside regular program execution. Software dynamic instrumentation is one method for implementing process virtualization which dynamically instruments an application such that the application's code and the inserted code are interleaved together.DynamoRIO is a process virtualization system implemented using software code cache techniques that allows users to build customized dynamic instrumentation tools. There are many challenges to building such a runtime system. One major obstacle is transparency. In order to support executing arbitrary applications, DynamoRIO must be fully transparent so that an application cannot distinguish between running inside the virtual environment and native execution. In addition, any desired extra operations for a particular tool must avoid interfering with the behavior of the application.Transparency has historically been provided on an ad-hoc basis, as a reaction to observed problems in target applications. This paper identifies a necessary set of transparency requirements for running mainstream Windows and Linux applications. We discuss possible solutions to each transparency issue, evaluate tradeoffs between different choices, and identify cases where maintaining transparency is not practically solvable. We believe this will provide a guideline for better design and implementation of transparent dynamic instrumentation, as well as other similar process virtualization systems using software code caches.

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IA-32 execution layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium/spl reg/-based systems

Cited by 101 publications

References 0 publications

Low overhead dynamic binary translation on ARM

Low overhead dynamic binary translation on ARM

Dynamic Data Shapers Optimize Performance in Dynamic Binary Optimization (DBO) Environment

Transparent dynamic instrumentation

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