IBM zEC12 processor subsystem

Sonnelitter, Robert

doi:10.1109/hotchips.2013.7478304

Cited by 1 publication

(1 citation statement)

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“…The demand for large-capacity, high-performance data access increases as IBM and the IT industry continue to drive improvements for cloud, analytics, big data, mobile, social, and security applications. The memory capacity on the largest configured z13 system increased from 3 TB [for the IBM zEnterprise* EC12 (zEC12)] to 10 TB at the system level [1]. Memory speeds have doubled from 800 MHz to 1,600 MHz for double data rate generation-3 (DDR3) memory.…”

Section: Introductionmentioning

confidence: 99%

The IBM z13 memory subsystem for big data

et al. 2015

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The IBM z13i system uses the new IBM Centaur memory buffer chip, along with system topology changes, to more than triple system memory capacity (relative to the IBM zEnterprisei EC12) to 10 TB, and more than triple the drawer-level memory bandwidth to 384 GB/s, and double the DIMM (dual in-line memory module) frequency to 1,600 MHz. The z13 eliminates an asynchronous interface for better store protect key performance. The new memory power save feature on the z13 extends the benefit of the IBM customer power save mode and the IBM cycle steering recovery for lower power. The z13 system builds upon the IBM redundant array of independent memory (RAIM), introduced on the IBM z196 system. New reliability features include single-channel memory bus replay, incremental background lane calibration, and memory scrub hard-error management. An innovative fetch and store tagging architecture, along with a memory quiesce engine, is added to detect RAIM asynchronization events and to re-synchronize memory channels for better performance.

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Section: Introductionmentioning

confidence: 99%