Identification and Classification of Corrupted PUF Responses via Machine Learning

Suragani, Reshmi; Nazarenko, Emiliia; Anagnostopoulos, Nikolaos Athanasios; Mexis, Nico

doi:10.1109/host54066.2022.9839919

Cited by 12 publications

(4 citation statements)

References 13 publications

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“…PUF are the Hardware Assisted Security primitives for reliable and lightweight security in resource-constrained environments, such as the IoT and IoMT devices. A PUF creates secret keys from intricate physical characteristics of a material that are challenging to duplicate or clone, rather than preserving secrets [16]. PUF receives inputs in the form of "challenges" and outputs "responses" made up of genuine random numbers.…”

Section: Puf and Machine Learning Attack On Pufmentioning

confidence: 99%

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

Mahmud¹,

Sadhu²,

Yanambaka³

et al. 2023

Preprint

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The Internet of Medical Things (IoMT) is playing a pivotal role in the healthcare sector by allowing faster and more informed hospital care, personalized treatment, and medical solutions. A very effective and trustworthy solution for resource-constrained medical devices is provided by Physical Unclonable Functions (PUF) - based identity and authentication systems, however they are not yet entirely reliable. This paper proposes VXorPUF, a Vedic Principles - Based Hybrid XOR Arbiter PUF. Modeling attacks were performed on the proposed architecture and an accuracy of 49.80 % was achieved. Uniqueness, Reliability and Randomness were the figures of merit used to evaluate PUF.

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Section: Puf and Machine Learning Attack On Pufmentioning

confidence: 99%

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

Mahmud¹,

Sadhu²,

Yanambaka³

et al. 2023

Preprint

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show abstract

“…It gives designers the ability to raise the security of their creations while retaining the adaptability and effectiveness needed for various applications. The generation of secret keys [11][12][13], the generation of random numbers [14][15][16][17], the protection of FPGA intellectual property [18,19], the identification of devices [20], chip authentication [8,17], key exchange/agreement protocols [8,[21][22][23], the prevention of counterfeiting [24], and IoT security [8,[22][23][24][25][26][27] are a few intriguing applications of FPGA-based PUFs.…”

Section: Introductionmentioning

confidence: 99%

FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

Lata,

Cenkeramaddi

2023

Cryptography

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Field-programmable gate arrays (FPGAs) have firmly established themselves as dynamic platforms for the implementation of physical unclonable functions (PUFs). Their intrinsic reconfigurability and profound implications for enhancing hardware security make them an invaluable asset in this realm. This groundbreaking study not only dives deep into the universe of FPGA-based PUF designs but also offers a comprehensive overview coupled with a discerning comparative analysis. PUFs are the bedrock of device authentication and key generation and the fortification of secure cryptographic protocols. Unleashing the potential of FPGA technology expands the horizons of PUF integration across diverse hardware systems. We set out to understand the fundamental ideas behind PUF and how crucially important it is to current security paradigms. Different FPGA-based PUF solutions, including static, dynamic, and hybrid systems, are closely examined. Each design paradigm is painstakingly examined to reveal its special qualities, functional nuances, and weaknesses. We closely assess a variety of performance metrics, including those related to distinctiveness, reliability, and resilience against hostile threats. We compare various FPGA-based PUF systems against one another to expose their unique advantages and disadvantages. This study provides system designers and security professionals with the crucial information they need to choose the best PUF design for their particular applications. Our paper provides a comprehensive view of the functionality, security capabilities, and prospective applications of FPGA-based PUF systems. The depth of knowledge gained from this research advances the field of hardware security, enabling security practitioners, researchers, and designers to make wise decisions when deciding on and implementing FPGA-based PUF solutions.

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“…Error correction requires considerable hardware resources [12]. In [13,14], a convolutional neural network (CNN) model was used to classify the results of SRAM PUF to improve the stability of SRAM PUF. The reliability was improved to 97.34% [15].…”

Section: Introductionmentioning

confidence: 99%

“…Moreover, a digital image requires 256KB SRAM cells. The CNN model relies on the GPU to provide massive initial data [13]. The existing convolution model cannot be implemented on IoT devices.…”

Section: Introductionmentioning

confidence: 99%

Method for Improving the Reliability of SRAM-Based PUF Using Convolution Operation

2022

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This paper introduces a novel and efficient physical unclonable function (PUF) extraction method for SRAM. The proposed one-layer convolution scheme is based on a convolution operation, which significantly enhances the reliability of the PUF. To further reduce the hardware resources, a lightweight solution is presented based on a one-layer convolution scheme at the cost of a higher redundancy coefficient and a larger range for the inter-chip Hamming distance (HD). Both the above schemes only use certain hardware resources in the initial stage and the hardware resources are automatically released after PUF verification. The two schemes were verified using SRAM cells in three stm32f407 chips to output a 256-bit PUF response. The experimental results show that the one-layer convolution scheme required 8 KB SRAM, while the lightweight scheme used only 0.5 KB SRAM. The reliability of the one-layer convolution was found to be 100% when the redundancy coefficient was 0.08 and the inter-chip HD was 50.8073%. The reliability of the lightweight scheme was 100% and of the inter-chip HD was 50.195%.

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Identification and Classification of Corrupted PUF Responses via Machine Learning

Cited by 12 publications

References 13 publications

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

VXorPUF: A Vedic Principles - Based Hybrid XOR Arbiter PUF for Robust Security in IoMT

FPGA-Based PUF Designs: A Comprehensive Review and Comparative Analysis

Method for Improving the Reliability of SRAM-Based PUF Using Convolution Operation

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