Identification of RF Harmonic Distortion on Si Substrates and its Reduction Using a Trap-Rich Layer

Abstract

Harmonic distortion (HD) is measured arising from coplanar waveguide structures on various substrates at 900 MHz, and significant distortion for silicon substrates is demonstrated for the first time. For an input power of +35 dBm, 2 nd harmonic power of -47 dBm and 3 rd of -57 dBm are measured for a thru calibration structure on oxidized high-resistivity silicon (HRS) substrates, and 2 nd harmonic of -23 and 3 rd of -20 dBm for a longer line on a thinner oxide. These levels are high compared to a full cellular transmit switch product specification of -45 and -40 dBm for 2 nd and 3 rd harmonics, respectively, at similar power levels. The contribution of the silicon substrate to high harmonic levels is investigated experimentally, and an efficient technological solution based on the introduction of a trap-rich layer is demonstrated.

Nonlinear Behavior of Electronic Components Characterized With Precision Multitones From a Josephson Arbitrary Waveform Synthesizer

“…Similarly, commercially available cognitive radios will most likely borrow bandwidth from the UHF TV band (400 to 800 MHz) and the microwave regime (3 to 10 GHz) [7]. Furthermore, multimode cellular systems require knowledge of distortion introduced by antenna switches and other weakly nonlinear components to accurately decode highly modulated waveforms [8]- [10]. So, JAWS systems could also be used to provide traceability in modulated signal measurements, but in order to take advantage of the low-distortion JAWS waveforms for communication applications, superheterodyning techniques are presently needed to upconvert the quantum-accurate, synthesized waveforms to the RF and microwave bands.…”

Substrate Engineering of Inductors on SOI for Improvement of Q-Factor and Application in LNA

“…HR-SOI has more losses because of the parasitic surface conduction layer formed close to the back Si-SiO2 interface. In TR-SOI, a layer of polysilicon is introduced at the interface to mitigate this effect in such a way that losses are considerably reduced [8], [24], [25]. The discussed results for membranes are also applicable to newer SOI wafer technologies like those involving PN doped implants to combat the interface parasitic conduction layer [26], [27].…”

Mitigation of substrate coupling effects in RF switch by localized substrate removal using laser processing

“…On the other hand, for TR-SOI substrate, the S21 response at a given frequency remains flat regardless of the chuck bias. This behavior is assigned to the elimination of the interface conduction layer and also to the strong pinning of the potential due to the presence of a trap-rich layer that totally screens out the electrostatics below the BOX/handler interface [10]. At frequencies 5 GHz, the S21 curves are flat for both substrates.…”