2020 IEEE Symposium on VLSI Technology 2020
DOI: 10.1109/vlsitechnology18217.2020.9265088
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III/V-on-Bulk-Si Technology for Commercially Viable Photonics-Integrated VLSI

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Cited by 3 publications
(4 citation statements)
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“…12(c) shows that this translates to 52 % higher optical powers at 70 ºC. Details of the thermal analyses can be found in the previous reports [36]- [38]. Overall, the III/V-on-BS platform has the optical disadvantage of the higher WG loss, but has the thermal advantage of the lower thermal impedance, providing competitive advantage over the SOI platform in temperature-sensitive applications.…”
Section: Performance Of Iii/v-on-bs Platformmentioning
confidence: 83%
“…12(c) shows that this translates to 52 % higher optical powers at 70 ºC. Details of the thermal analyses can be found in the previous reports [36]- [38]. Overall, the III/V-on-BS platform has the optical disadvantage of the higher WG loss, but has the thermal advantage of the lower thermal impedance, providing competitive advantage over the SOI platform in temperature-sensitive applications.…”
Section: Performance Of Iii/v-on-bs Platformmentioning
confidence: 83%
“…As the III/V portion of the optical mode distribution increases, the optical gain increases but the internal optical loss also increases. The local SOI structure on the BS substrate was implemented through a proprietary solid-phase epitaxy(SPE) process, and its details have been published in the literature [9,10,[25][26][27][28][29]. In the horizontal structure in Fig.…”
Section: Conceptmentioning
confidence: 99%
“…Therefore, recent light source development tends to pursue single-chip integration along with various photonic devices on top of a Si substrate instead of a conventional III/V one. In the incumbent CMOS industry, the integration tendency has been further strengthened so that the generic bulk-Si(BS) substrate is preferred instead of the specialty Si-on-insulator(SOI) substrate for light source development to facilitate future integration with volume CMOS products such as DRAM [25][26][27][28][29]. This paper presents design and verifying experimental results that avoid single-mode instability from the long PS in the III/V-on-BS DFB LD.…”
Section: Introductionmentioning
confidence: 99%
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