Image parallel processing based on GPU

Zhang, Nan; Chen, Yunshan; Wang, Jianli

doi:10.1109/icacc.2010.5486836

Cited by 49 publications

(17 citation statements)

References 2 publications

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“…They have emphasized that the memory access latency is the main bottleneck to improve performance. Zhang et al also have achieved similar results by implementing an edge detection and homomorphic filtering in CUDA [4]. They have obtained a speedup factor up to 50 when compared with CPU-only performance.…”

Section: Background and Motivationsupporting

confidence: 63%

A time-efficient image processing algorithm for multicore/manycore parallel computing

2015

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Traditional methods for processing large images are extremely time intensive. Also, conventional image processing methods do not take advantage of available computing resources such as multicore central processing unit (CPU) and manycore general purpose graphics processing unit (GP-GPU). Studies suggest that applying parallel programming techniques to various image filters should improve the overall performance without compromising the existing resources. Recent studies also suggest that parallel implementation of image processing on compute unified device architecture (CUDA)-accelerated CPU/GPU system has potential to process the image very fast. In this paper, we introduce a CUDA-accelerated image processing method suitable for multicore/manycore systems. Using a bitmap file, we implement image processing and filtering through traditional sequential C and newly introduced parallel CUDA/C programs. A key step of the proposed algorithm is to load the pixel's bytes in a one dimensional array with length equal to matrix width * matrix height * bytes per pixel. This is done to process the image concurrently in parallel. According to experimental results, the proposed CUDA-accelerated parallel image processing algorithm provides benefit with a speedup factor up to 365 for an image with 8,192x8,192 pixels.

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Section: Background and Motivationsupporting

confidence: 63%

A time-efficient image processing algorithm for multicore/manycore parallel computing

2015

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“…Threads within a block cooperate via shared memory [15] [16]. So the image can be mapped into one CUDA grid [17]. And each sub-stamp (the size is usually 21x21 pixels) can be mapped into a block within the grid accordingly.…”

Section: A Adapt Aisp To Cuda Frameworkmentioning

confidence: 99%

A GPU-based algorithm for astronomical image subtraction photometry

Sun

et al. 2013

Proceedings 2013 International Conference on Mechatronic Sciences, Electric Engineering and Computer (MEC)

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Astronomical image subtraction photometry is an essential method in the discovery of new celestial or astronomical phenomena. However, the original algorithm for astronomical image subtraction photometry costs long time when dealing with large scale images. So in order to match the trend of large data volume in the field of astronomy and the requirement of realtime processing, an algorithm based on CUDA GPU is proposed to accelerate astronomical image subtraction photometry. This paper analyzes the overall performance of the original algorithm and migrates the template image convolution part which is the most time consuming into GPU. The implementation and experiment of the proposed algorithm is based on HOTPANTS package, which is an open-source tool for astronomical image subtraction photometry. The experiment shows that the proposed algorithm is almost 9 times faster than the original one in the template image convolution part. The overall performance is improved by 50% to 60% in comparison with the original algorithm with acceptable accuracy.

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“…CPUs offer limited performance on bandwidth demanding real time algorithms mainly due to its non-parallel and non-flexible system design. GPUs [4] offer a much better performance capability compared to 978-1-4799-4006-6/14/$31.00 ©20 14 IEEE CPUs, but greatly lack a unified development platform and has no cross platform library compatibility. Moreover, the interface available to interact with GPUs is the PCI Express and hence the need for a computer is a must.…”

Section: Introductionmentioning

confidence: 99%

An efficient hardware architecture for stereo disparity estimation

Joseph

Francis

Hore

et al. 2014

18th International Symposium on VLSI Design and Test

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This paper presents an architecture for disparity estimation in real time which is designed to be used in a blind navigation assistance system. A highly pipelined hardware prototype has been designed and verified. Sum of Absolute Difference (SAD) algorithm is chosen as the cost function in the proposed architecture. The major design consideration is efficient hardware utilization and high throughput. This system is designed to support video resolutions upto 2048 x 2048 at high frame rates. The performance evaluation shows very low latency even at low processing frequency.

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Image parallel processing based on GPU

Cited by 49 publications

References 2 publications

A time-efficient image processing algorithm for multicore/manycore parallel computing

A time-efficient image processing algorithm for multicore/manycore parallel computing

A GPU-based algorithm for astronomical image subtraction photometry

An efficient hardware architecture for stereo disparity estimation

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