Imaging performance of the EUV alpha semo tool at IMEC

Lorusso, Gian; Hermans, Jan; Goethals, Anne-Marie; Baudemprez, Bart; Roey, Frieda Van; Myers, Alan M.; Kim, I.; Kim, B. S.; Jonckheere, R.; Niroomand, Ardavan; Lok, Sjoerd; Dijk, Andre van; Marneffe, J.-F. de; Demuynck, S.; Goossens, D.; Ronse, Kurt G.

doi:10.1117/12.771983

Cited by 18 publications

(13 citation statements)

References 10 publications

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“…IMEC has recently installed one of the very first EUV full-field tools. This ASML Alpha Demo Tool (EUV ADT) is providing important learning to the industry on the implementation of EUV lithography in silicon processing ( Figure 2) [7,8]. …”

Section: Lithography Tool and Process Optionsmentioning

confidence: 99%

Lithography options and challenges for sub-45nm node interconnect layers

Maenhoudt

2008

2008 International Interconnect Technology Conference

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Section: Lithography Tool and Process Optionsmentioning

confidence: 99%

Lithography options and challenges for sub-45nm node interconnect layers

Maenhoudt

2008

2008 International Interconnect Technology Conference

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“…5 For mature technologies such as ArF and KrF lithography, resist materials are typically optimized for line/space, trench, isolated line, or contact hole performance. At this time, EUV resists are not as mature, and are not typically categorized in this manner.…”

Section: Contact/via Patterning Using the 03na Lbnl Euv Metmentioning

confidence: 99%

Evaluation of EUV resist materials for use at the 32 nm half-pitch node

et al. 2008

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The 2007 International Technology Roadmap for Semiconductors (ITRS) 1 specifies Extreme Ultraviolet (EUV) lithography as one leading technology option for the 32nm half-pitch node, and significant world wide effort is being focused towards this goal. Readiness of EUV photoresists is one of the risk areas. In 2007, the ITRS modified performance targets for high-volume manufacturing EUV resists to better reflect fundamental resist materials challenges. For 32nm half-pitch patterning at EUV, a photospeed range from 5-30 mJ/cm 2 and low-frequency linewidth roughness target of 1.7nm (3σ) have been specified. Towards this goal, the joint INVENT activity (AMD, CNSE, IBM, Micron, and Qimonda) at Albany evaluated a broad range of EUV photoresists using the EUV MET at Lawrence Berkeley National Laboratories (LBNL), and the EUV interferometer at the Paul Scherrer Institut (PSI), Switzerland. Program goals targeted resist performance for 32nm and 22nm groundrule development activities, and included interim relaxation of ITRS resist performance targets. This presentation will give an updated review of the results. Progress is evident in all areas of EUV resist patterning, particularly contact/via and ultrathin resist film performance. We also describe a simplified figure-of-merit approach useful for more quantitative assessment of the strengths and weaknesses of current materials.

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“…There are a few basic reasons for that. The prototypes operational in the field have been able to demonstrate the feasibility of 32-and 22-nm node devices, [1][2][3][4][5][6] and preproduction tools are expected to be delivered by 2010. Optics contamination has been proven to be under control, and EUV-specific effects such as shadowing and flare, have been demonstrated to be quite predictable, hence, correctable.…”

Section: Introductionmentioning

confidence: 99%

Design correction in extreme ultraviolet lithography

Fenger

Lorusso

Hendrickx

et al. 2010

J. Micro/Nanolith. MEMS MOEMS

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Extreme ultraviolet (EUV) lithography is currently the most promising technology for advanced manufacturing nodes. This study aims to assess in detail the quality of a full chip optical correction for a EUV design, as well to discuss the available approaches to compensate for EUV-specific effects. Extensive data sets have been collected on the ASML EUV Alpha-Demo Tool using the latest Interuniversity Microelectronics Center baseline resist Shin-Etsu SEVR59. In total ∼1300 critical dimension (CD) measurements at wafer level and 700 at mask level were used as input for model calibration and validation. The smallest feature size in the data set was 32 nm. Both one-dimensional and twodimensional structures through CD and pitch were measured. The reticle used in this calibration exercise allowed one to modulate flare by varying tiling densities. The shadowing effect was modeled by means of a single bias correction throughout the design. Horizontal and vertical features of different types through pitch and CD were used to calibrate the shadowing correction. The model calibration yielded an root-mean square of ∼1 nm, which was observed to improve by including reticle CD data. An EUV mask fully corrected for optical proximity correction, flare and shadowing was fabricated and qualified, demonstrating the effectiveness of the implemented corrections. C 2010 Society of Photo-Optical Instrumentation Engineers.

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Imaging performance of the EUV alpha semo tool at IMEC

Cited by 18 publications

References 10 publications

Lithography options and challenges for sub-45nm node interconnect layers

Lithography options and challenges for sub-45nm node interconnect layers

Evaluation of EUV resist materials for use at the 32 nm half-pitch node

Design correction in extreme ultraviolet lithography

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