Impact-ionization induced instabilities in high-speed bipolar transistors and their influence on the maximum usable output voltage

Foundation of rf CMOS and SiGe BiCMOS technologies

“…Figure 25 compares the 1/f performance of four devices from the 0.18-m SiGe 7HP BiCMOS technology: a 3.3-V n-FET, a 3.3-V p-FET, a high-f T SiGe bipolar, and a highbreakdown SiGe bipolar. We focus on the 3.3-V FET variants here, since these devices support the higher supply voltages commonly used to achieve signal headroom 6 in analog circuit design. The proximity of surfaces contributes significant noise signal in the n-FET, extending out well beyond 100 kHz.…”

“…Either structure may be formed into a protective, isolating moat. 6 The term headroom denotes the processing power beyond that required by the application. Although a variety of isolating structures are available to the designer, not all are equally effective at achieving isolation.…”

“…All devices in the production technologies must pass stringent quality and reliability tests [5]. Both the 120-GHz and 210-GHz technologies exhibit collector-emitter breakdown voltage with base open circuit (BV CEO ) values around 2 V, but this is not a serious concern, because in typical circuits the base is biased through a finite resistance and the true HBT breakdown voltage is between BV CER and BV CES (typically between 3.5 V and 6.5 V. It is more important to know the safe operation area and how large signal parameters vary as a function of use condition [6,7].…”