Loop unrolling is a commonly used optimization technique in VLIW architectures that increases the number of executable instructions in code, thereby improving instruction-level parallelism. However, existing loop unrolling techniques often include a significant number of loop condition instructions and induction variable update instructions, which consume various register resources and result in additional power consumption. In this paper, we propose a loop compilation optimization method based on basic loop unrolling techniques, focusing on fixed iteration count loops and employing dual-mode unrolling. This method eliminates the loop structure, enhances instruction-level parallelism, and improves the flexibility of subsequent instruction scheduling. We describe the compilation optimization process of this dual-mode unrolling approach. Finally, we conduct experimental research using the FT-M7002 hardware platform. The experimental results demonstrate that our dual-mode unrolling method achieves an average performance improvement of 5% to 8% compared to basic loop unrolling techniques.