Plasma etching steps are critical for MOS channel High Electron Mobility Transistors (MOSc-HEMT) gate fabrication as they can deteriorate electrical performances due to gallium nitride degradation. Adding SiCl4 to a low bias Cl2 plasma in presence of a SiN hard mask environment forms a silicon-based passivation layer that protects GaN from nitrogen depletion (N/Ga = 1) as extracted from X-ray Photoelecron Spectroscopy (XPS) measurements. The deposited layer is not removed by subsequent surface treatments that precede the gate dielectric deposition such as O2 plasma and HCl. This nitrogen preservation as well as the passivation’s presence result in a higher flat band voltage (VFB) due to less positive charge generation at the GaN/dielectric interface. This SiCl4-based etching process could then be used as a 20 nm plasma etching finishing step in order to recover GaN surface after a fast and damaging trench formation process.