Impact of gate workfunction fluctuation on FinFET standard cells

Meinhardt, Cristina; Zimpeck, Alexandra L.; Reis, Ricardo

doi:10.1109/icecs.2014.7050050

Cited by 19 publications

(3 citation statements)

References 13 publications

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“…It happens due to the orientation of metal grains that are randomly aligned in the FinFET manufacturing process. So, WFF represents the most significant variation beyond the other parameters [36]. The process variabil- II.…”

Section: Methodsmentioning

confidence: 99%

FinFET Inverter Designs: Behavior and Challenges of Process Variability

Moraes

Zimpeck

Minhardt

et al. 2021

JICS

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Abstract— Technology scaling alongside the increasing process variability impact in modern technology nodes are themain reasons to control deviations over metrics in IC nanome-ter designs. Schmitt Triggers are traditionally used for noise immunity enhancement, and have been recently applied to mitigate radiation effects and process variability impact. The main contribution of this work is to trace the relationship between transistor sizing, supply voltage, and process variability to get a low energy consumption circuit while still keeping low levels of deviations due to the impact of process-induced variability. It is shown that a cost-benefit analysis can highlight sets of sizing and supply voltage where it can provide a 37.51% decrease in energy consumption while only increasing its sensibility by 7.42%. Furthermore, it is presented that the dependence of supply voltage and sensibility to process variability is not directly related, with slight decreases in the supply volt-ages bringing better results. Overall, the traditional CMOS inverter is still the fastest and most energy-efficient circuit, although, when comparing noise immunity characteristics, the 6-Transistor Schmitt Trigger presents higher noise margins, slopes, gains, and hysteresis ratios. The improvements,although, may increase propagation times, energy consumption, and area.

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Section: Methodsmentioning

confidence: 99%

FinFET Inverter Designs: Behavior and Challenges of Process Variability

Moraes

Zimpeck

Minhardt

et al. 2021

JICS

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show abstract

“…Process variability was taken through 10000 Monte Carlo simulations with the workfunction parameter modeled as a Gaussian function with 3 deviation of 5% from nominal values. In these experiments, only workfunction fluctuation (WFF) is considered because this process parameter has been shown as the main process source of variability in FinFET devices [13,23]. This experiment leaves all other 14nm PTM-MG characteristic values unchanged [26].…”

Section: Process Variability Effectsmentioning

confidence: 98%

“…To the best of our knowledge, the first investigation of the impact of WFF due to process variability analysing timing and power consumption in standard cell library at 20nm FinFET technology was presented in [23]. A complementary work [24] evaluated the PVT variability effects on a set of standard cells from a commercial library, but it only considers the minimum transistor sizing for all transistors and cells, i.e., the number of fins equal to 1 in each device.…”

Section: Related Work and Contribuitionsmentioning

confidence: 99%

Process variability in FinFET standard cells with different transistor sizing techniques

Zimpeck

Meinhardt

Posser

et al. 2015

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)

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This work evaluates the impact of process variations on the electrical behavior of a set of combinational cells considering different transistor sizing techniques: minimum sizing, logical effort and delay-optimized sizing. The optimization is done by a transistor sizing tool that employs geometric programming. The main point is to observe how transistor sizing techniques could be explored for the FinFET standard cells design. Results show that cells sized accordingly logical effort technique are more sensible to process variability when compared with minimum transistor sizing. The best process variability robustness is achieved by adopting the delayoptimized sizing technique.

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Robust FinFET Schmitt Trigger Designs for Low Power Applications

Moraes¹,

Zimpeck²,

Meinhardt³

et al. 2020

IFIP Advances in Information and Communication Technology

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The IoT development alongside with the more pronounced impact of process variability in modern technology nodes, is the central reason to control variability impact. Given the broad set of IoT devices running on battery-oriented environments, energy consumption should be minimal and the operation reliable. Schmitt Trigger inverters are frequently used for noise immunity enhancement, and have been recently applied to mitigate radiation effects and variability impact. Yet, Schmitt Trigger operation at nominal voltage still introduces high deviation on power consumption. Thus, the main contribution of this work is to identify the relationship between transistor sizing, supply voltage, energy, and process variability robustness to achieve a minimal energy consumption circuit while keeping robustness. On average, scenarios with a lower supply voltage applied on layouts with a smaller number of fins, presented adequate robustness in high variability scenarios. Exploring voltage and transistor sizing made possible a reduction of about 24.84% on power consumption.

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Impact of gate workfunction fluctuation on FinFET standard cells

Cited by 19 publications

References 13 publications

FinFET Inverter Designs: Behavior and Challenges of Process Variability

FinFET Inverter Designs: Behavior and Challenges of Process Variability

Process variability in FinFET standard cells with different transistor sizing techniques

Robust FinFET Schmitt Trigger Designs for Low Power Applications

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