Impact of nitridation of SiO2 gate oxide on 1/f noise in 0.18um CMOS

Abstract

Nitridation of the gate oxide is a mean to avoid boron penetration through the gate oxide for deep-submicron CMOS technologies. The impact of the nitridation on the 1/f noise is examined for long and minimum length transistors in the saturation and linear region, for both PMOS and NMOS. Conclusions will be drawn with respect to analog applications.

Silicon on Insulator Technology Review

“…In comparison with bulk the SOI technologies appear to be more suited for the future sub nanometer and low supply voltage technologies. The power consumption is also expected to decrease if SOI [96,97]is used instead of bulk devices.…”

“…• Different [96,112] voltages may be used on different devices without the added processing steps required for triple wells • Faster [137,41,61] device operation (speed/power product) due to reduction of parasitic capacitance (primarily due to reduced source-drain junction capacitance, but also from gate-tosubstrate capacitance and metal-to-substrate capacitance):…”