Impact of Raising Switching Stages on the Reliability of Interconnection Networks

Bistouni, Fathollah; Jahanshahi, Mohsen

doi:10.33969/jiec.2020.21007

Cited by 38 publications

(12 citation statements)

References 30 publications

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“…The authors in [58] studied the impact of increasing the number of switching stages on the reliability of SENs. They showed that SEN with an extra stage has higher reliability for small-scale systems in addition to its lower hardware cost.…”

Section: Recent Advancesmentioning

confidence: 99%

“…In this section, we take some beneficial lessons towards making research advancements in the design of efficient interconnection networks from the literature (such as [2,3,7,21,35,58,[61][62][63][64][65][66][67][68]) and open up some new directions and guidelines.…”

Section: Future Recommendationsmentioning

confidence: 99%

“…Performance modelling helps designers make accurate decisions on alternatives regarding interconnection network system design [75]. Recent research (see [58]) has shown that there exist a gap in current literature with regards to time-dependent reliability analysis. Furthermore, the event that a terminal node (source/destination) fails should be incorporated into future analysis to make it more comprehensive [58].…”

Section: Performance Analysismentioning

confidence: 99%

“…Recent research (see [58]) has shown that there exist a gap in current literature with regards to time-dependent reliability analysis. Furthermore, the event that a terminal node (source/destination) fails should be incorporated into future analysis to make it more comprehensive [58]. It is also essential to make numerical analysis for very large-scale networks.…”

Section: Performance Analysismentioning

confidence: 99%

See 3 more Smart Citations

A Primer on Design Aspects and Recent Advances in Shuffle Exchange Multistage Interconnection Networks

et al. 2021

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Interconnection networks provide an effective means by which components of a system such as processors and memory modules communicate to provide reliable connectivity. This facilitates the realization of a highly efficient network design suitable for computational-intensive applications. Particularly, the use of multistage interconnection networks has unique advantages as the addition of extra stages helps to improve the network performance. However, this comes with challenges and trade-offs, which motivates researchers to explore various design options and architectural models to improve on its performance. A particular class of these networks is shuffle exchange network (SEN) which involves a symmetric N-input and N-output architecture built in stages of N/2 switching elements each. This paper presents recent advances in multistage interconnection networks with emphasis on SENs while discussing pertinent issues related to its design aspects, and taking lessons from the past and current literature. To achieve this objective, applications, motivating factors, architectures, shuffle exchange networks, and some of the performance evaluation techniques as well as their merits and demerits are discussed. Then, to capture the latest research trends in this area not covered in contemporary literature, this paper reviews very recent advancements in shuffle exchange multistage interconnection networks within the last few years and provides design guidelines as well as recommendations for future consideration.

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Section: Recent Advancesmentioning

confidence: 99%

Section: Future Recommendationsmentioning

confidence: 99%

Section: Performance Analysismentioning

confidence: 99%

Section: Performance Analysismentioning

confidence: 99%

See 2 more Smart Citations

A Primer on Design Aspects and Recent Advances in Shuffle Exchange Multistage Interconnection Networks

et al. 2021

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“…16,[20][21][22][23][24][36][37][38][39]42 To meet such a challenging requirement of these super systems MIN are designed to behave as highly reliable and fault-tolerant interconnection networks. [25][26][27][28][33][34][35][36][37][44][45][46][47][48][49][50] Lot of researchers have paid attention in recent future to develop new designs of MIN which can withstand with multiple fault occurring in the network to provide reliable and pose free communication between processors and memories. [23][24][25][26][27][28][29]32,35,37 All designs of MINs proposed in last five years were centered around providing high fault tolerance by providing more redundant or alternative paths from each source to destination so as to bear more number of faults and providing dynamic rerouting scheme to reroute the packet to the destination through either backtracking or by activating alternative SE 1,[8][9][10][11][12][13]…”

mentioning

confidence: 99%

Fault Tolerant Gamma-Minus Network

Gupta

2023

ECS Adv.

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In large-scale supercomputers, thousands of processors are connected together to their respective memory modules which are controlled by several control units connected in parallel. Large data streams have to be communicated between these processors and memories through interconnection networks. A multistage interconnection network (MIN) is an efficient way to provide these communications at a very reasonable cost. For such large systems, MIN should be highly reliable and fast to meet the desired specifications of these high speed switch fabrics.Here, two new architectures of MIN are proposed, denoted as fault-tolerant Gamma-Minus (FTGM-1 & FTGM-2) networks. These proposed architectures are multistage multipath interconnection networks with totally disjoint paths and are highly reliable and fault-tolerant networks. The routing algorithm proposed for these structures is simple distance tag routing with non-backtracking which overcomes rerouting overheads and hence improve communication delays. The proposed MIN ensures multiple fault tolerance at each stage including input and output stage with minimal horizontal distance between source node to destination node. A comparison of different recently proposed MINs with these new designs are also given on reliability basis to prove the supremacy of these designs over the previously proposed networks.

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Investigating the reliability of all-optical switches in transient mode

Barabanova

Vytovtov

Vishnevsky

et al. 2021

J. Phys.: Conf. Ser.

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In this paper the scheme of 8×8 all-optical switch with two duplicating switching elements and the algorithm of its functioning are presented. For calculating the reliability of all-optical switches, the analytical method based on the Markov process theory is presented. This method allows us to calculate reliability indicators of the all-optical switches as downtime coefficient and availability factor in stationary and transient modes and time of transient mode. The results of numerical calculations show that an increase in the number of duplicating elements by one gives decrease in the downtime coefficient by 6 percent, and the time of the transient process is halved in this case.

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Impact of Raising Switching Stages on the Reliability of Interconnection Networks

Cited by 38 publications

References 30 publications

A Primer on Design Aspects and Recent Advances in Shuffle Exchange Multistage Interconnection Networks

A Primer on Design Aspects and Recent Advances in Shuffle Exchange Multistage Interconnection Networks

Fault Tolerant Gamma-Minus Network

Investigating the reliability of all-optical switches in transient mode

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