In this paper, a series of hot carriers tests of irradiated 130 nm partially depleted silicon-on-insulator NMOSFETs is carried out in order to explore the HCI influence on the ionizing radiation damage. Some devices are irradiated by up to 3000 Gy before testing the hot carriers, while other devices experience hot carriers test only. All the devices we used in the experiments are fabricated by using a 130 nm partially depleted (PD) SOI technology. The devices each have a 6nm-thick gate oxide, 100 nm-thick silicon film, and 145 nm-thick buried oxide, with using shallow trench isolation (STI) for isolation scheme. The irradiation experiments are carried by 60Co- ray at the Xinjiang Technical Institute of Physics and Chemistry, Chinese Academy of Sciences, with a dose rate of 0.8~Gy(Si)/s. During irradiation all the samples are biased at 3.3V, i.e., VGS=3.3V and other pins are grounded, and when the devices are irradiated respectively by total doses of 500, 1000, 2000 and 3000Gy(Si), we test the characteristic curves again. Then 168-hour room temperature anneal experiments are carried out for the irradiated devices, using the same biases under irradiation. The HCI stress condition is chosen by searching for the maximum substrate current. The cumulative stress time is 5000s, and the time intervals are 10, 100, 500, 1000 and 5000s respectively. After each stress interval, the device parameters are measured until stress time termination appears. Through the comparison of characteristic between pre-irradiated and unirradiated devices, we find that the total dose damage results in the enhanced effect of hot carriers: the substrate current value which characterizes the hot carrier effect (for SOI device are the body to the ground current) increases with the increase of total dose, as the pre-irradiated and unirradiated device do under the same conditions of hot carrier stress, the degradations of key electrical parameters are more obvious for the pre-irradiated one. In order to analyze the physical mechanism of the experimental phenomena, the wide channel device is tested too, we also analyze the phenomenon of the decrease of the substrate current of the wide channel device. From the contrasts of pre-irradiated and unirradiated devices, and narrow and wide channel device test results, we can obtain the following conclusions: SOI devices (especially the narrow channel device) with additional ionization irradiation field induced by ionizing radiation enhance the rate of injecting electrons into the silicon dioxide, and produce oxide trap charge and interface states, which leads to the fact that the channel carrier scattering becomes stronger, transfer characteristic curve of the device, output characteristic curve, transconductance curves and the related parameters of VT, GMmax, IDSAT degradation degree increase. So, when designing 130nm PD SOI NMOSFETs which are applied to the space environment, one should make a compromise between radiation resistance and HCI reliability.
