We have proposed and experimentally demonstrated bi‐layer tunneling n‐ and p‐channel FETs (TFETs) composed of oxide semiconductor/ group IV type‐II heterojunctions, utilizing lower conduction band edge of oxide semiconductors than that of group IV semiconductors. The simulation study has revealed that ZnO/Si or Ge TFETs can exhibit extremely‐steep sub‐threshold slope of ~ 1 mV/dec with Ion of ~100 μA/μm order. The operation of bi‐layer ZnO(ZnSnO)/Ge(Si) TFETs has been experimentally demonstrated with a minimal subthreshold slope of 71 mV/dec at room temperature. The p‐TFET operation and n/p‐TFET operations on a same device have also been shown by using ZnSnO/SiGe‐OI structure, leading to realization of C‐TFET