Impact of temperature increments on tunneling barrier height and effective electron mass for plasma nitrided thin SiO2 layer on a large wafer area

Abstract

Thermally grown SiO 2 layers were treated by a plasma nitridation process realized in a vertical furnace. The combination of a pulsed-low frequency plasma and a microwave remote plasma with N 2 / NH 3 / He feed gas mixture was used to nitride the thermally grown SiO 2 gate dielectrics of MIS structures. Temperature dependency of effective masses and the barrier heights for electrons in pure thermally grown SiO 2 as well as plasma nitrided SiO 2 in high electric field by means of FowlerNordheim regime was determined. It is frequently seen from the literature that either effective electron mass or barrier height ͑generally effective electron mass͒ is assumed to be a constant and, as a result, the second parameter is calculated under the chosen assumption. However, in contrast to general attitude of previous studies, this work does not make any such assumptions for the calculation of neither of these two important parameters of an oxide at temperature ranges from 23 to 110°C for SiO 2 , and 23 to 130°C for nitrided oxide. It is also shown here that both parameters are affected from the temperature changes; respectively, the barrier height decreases while the effective mass increases as a result of elevated temperature in both pure SiO 2 and plasma nitrided SiO 2 . Therefore, one parameter could be miscalculated if the other parameter, i.e., effective mass of electron, was assumed to be a constant with respect to variable physical conditions like changing temperature. Additionally, the barrier heights were calculated just by taking constant effective masses for both types of oxides to be able to compare our results to common literature values.

Impact of incorporated oxygen quantity on optical, structural and dielectric properties of reactive magnetron sputter grown high-κ HfO2/Hf/Si thin film

“…Also, we observed that the films grown at higher sputtering powers than that of 30 W have a very broad and low intensity signal of (1 1 1) particles under higher sputtering powers gain increased velocities, they probably transfer heat onto the film surface resulting in a possible temperature increment of film surface. It is well known from literature that the substrate heating generally results in crystallization of grown film [20,26,27], which is undesirable for highdielectrics because of the formation of leakage current in the films [14,28,29]. Even though the substrate is not intentionally heated during the deposition and the sputtering is realized at room temperature, an unintentional heating of film's surface take place as a result of increased sputtering power giving rise to a crystalline thin film structure.…”

Electrical and material characterizations of HfTiO4 flash memory devices with post-annealing

“…According to Fowler-Nordheim tunneling theory, during the programming operation, hot electrons tunnel through the tunneling oxide as a triangular barrier under a high applied electric field to the HfTiO 4 charge trapping layer. 11 After the programming operation, the device with an annealing temperature of 950 C performed better, with a larger positive V FB (flat band voltage) shift than the device with the lower annealing temperature of 800 C. 12,13 Therefore, proper annealing can also enhance the P/E speed, because annealing improves the high-k layer quality and increases electron trapping by increasing the effective electric field across the tunneling oxide. 14 Material analyses, including XRD and AFM, were conducted in order to gain an in-depth understanding of the improvements in the electrical characteristics of the device.…”

Mechanism of oxide thickness and temperature dependent current conduction in n+-polySi/SiO2/p-Si structures — a new analysis

“…FN tunneling current is a major concern for the reliability of MOS structures as well as for the functionality of electrically erasable programmable read-only memory (EEPROM) devices at room temperature [4] and also at elevated temperatures [7] . Therefore, since early 1970s FN tunneling mechanism has been received much attention by several researchers [2][3][4][5][6][7][8][9][10] .…”

“…Incorporating the temperature variations empirically in B FN and A FN , the above LS Eq. ( 1) has also been used by other researchers to explain the current conduction in MOS devices as FN tunneling at elevated temperatures [7][8][9][10] . However, the validity of the LS Eq.…”