Impact of the Noise on the Emulated Grid Voltage Signal in Hardware-in-the-Loop Used in Power Converters

Lamo, Paula; Ruiz, Gustavo A.; Azcondo, F.J.; Pigazo, Alberto; Brañas, C.

doi:10.3390/electronics12040787

Cited by 2 publications

(1 citation statement)

References 56 publications

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“…The operation-specific SNR computation method provides a more technical approach [7][8][9]. This method computes the SNR for each operation and employs a brute-force strategy to explore all potential results within a given range [19][20]. Despite its ability to uncover optimal solutions within the range, this method is both time and resource-intensive, particularly as the scale of the case expands.…”

Section: E Comprehensive Comparisonmentioning

confidence: 99%

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

Zhao,

Du,

Deng

et al. 2023

IEEE Access

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Power converters become increasingly important in the power industry. To enhance design reliability and efficiency, real-time simulation is a popular method for testing control units of these devices. FPGA-based real-time simulation is considered a genuine alternative to CPU-based applications as control unit frequencies increase. Although automated tools can map simulation methods from floating-point highlevel languages to fixed-point FPGA, manually selecting the fixed-point word length to meet precision requirements involves a significant amount of tedious and repetitive work. Word length selection also impacts FPGA hardware resource usage. This paper proposes an adaptive word length selection method under accuracy constraints to minimize hardware resources. The innovation lies in using error noise models to compute analytical expressions relating simulation model accuracy to word length. The adaptive word length selection process is combined with commercial high-level synthesis tools to achieve high resource optimization performance. A three-phase inverter example demonstrates the benefits of our method in calculating model accuracy and optimizing FPGA hardware resources in simulations.INDEX TERMS Real-time simulation, field-programmable gate arrays resource optimization, power converter, word-length selection.

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Section: E Comprehensive Comparisonmentioning

confidence: 99%

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

Zhao,

Du,

Deng

et al. 2023

IEEE Access

View full text Add to dashboard Cite

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Efficient Hardware-in-the-Loop Models Using Automatic Code Generation with MATLAB/Simulink

2023

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Hardware-in-the-loop testing is usually a part of the design cycle of control systems. Efficient and fast models can be created in a Hardware Description Language (HDL), which is implemented in a Field-Programmable Gate Array (FPGA). Control engineers are more skilled in higher-level approaches. HDL models derived automatically from schematics have noticeably lower performance, while HDL models derived from their equations are faster and smaller. However, even models translated automatically into HDL using the equations might be worse than manually coded models. A design workflow is proposed to achieve manual-like performance with automatic tools. It consists of the identification of similar operations, forcing signal signedness, and adjusting to multiplier input sizes. A detailed comparison was performed between three workflows: (1) translation of high-level MATLAB code, (2) translation of a Simulink model, and (3) working directly in the HDL. Sources of inefficiency were shown in a buck converter, and the process was validated in a full-bridge with electrical losses using a Runge–Kutta method. The results showed that the proposed approach delivered code that performed very close to a reference VHDL implementation, even for complex designs. Finally, the model was implemented in an off-the-shelf FPGA board suitable for a hardware-in-the-loop test setup.

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Impact of the Noise on the Emulated Grid Voltage Signal in Hardware-in-the-Loop Used in Power Converters

Cited by 2 publications

References 56 publications

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

An Adaptive Word-Length Selection Method to Optimize Hardware Resources for FPGA-Based Real-Time Simulation of Power Converters

Efficient Hardware-in-the-Loop Models Using Automatic Code Generation with MATLAB/Simulink

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