Impact of TSV process on 14nm FEOL and BEOL reliability

Kannan, Sukeshwar; Premachandran, C.S.; Smith, Daniel M.; Ranjan, Rakesh; Cimino, S.; Yeap, Kong Boon; Wu, George; Cao, Linjun; Prabhu, Manjunatha; Agarwal, Rahul; Yao, Walter; England, Luke; Justison, Patrick

doi:10.1109/irps.2017.7936302

2017 IEEE International Reliability Physics Symposium (IRPS) 2017

DOI: 10.1109/irps.2017.7936302

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Impact of TSV process on 14nm FEOL and BEOL reliability

Sukeshwar Kannan

C.S. Premachandran

Daniel M. Smith

et al.

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Cited by 7 publications

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Advances and Reliability Challenges in Heterogeneous Integration in Chiplet ERA: From Solder to Copper to Optical Interconnects

Wu,

2024

2024 Conference of Science and Technology for Integrated Circuits (CSTIC)

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Impact of TSV process on 14nm FEOL and BEOL reliability

Cited by 7 publications

References 8 publications

Advances and Reliability Challenges in Heterogeneous Integration in Chiplet ERA: From Solder to Copper to Optical Interconnects

Advances and Reliability Challenges in Heterogeneous Integration in Chiplet ERA: From Solder to Copper to Optical Interconnects

3D Packaging Challenges for High-End Applications

Integration of an advanced 3D TSV with the 7nm EUV logic process

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