Impact of various silicide techniques on SiGe source–drain series resistance and mobility of pMOSFETs

Abstract

A comparative experimental study of series resistance and hole mobility of pMOSFETs with silicon germanium (SiGe) junctions under various silicide techniques is carried out. It is found that using an additional germanium pre-amorphous implant process in the nickel silicide (NiSi) techniques does not affect the hole mobility. However, it increases the source/drain series resistance. On the other hand, an additional silicon capping layer process in the NiSi techniques not only improves the hole mobility, but also reduces the series resistance dramatically. Various MOSFET characterizations from the silicide techniques are mainly due to the differences in the NiSi/SiGe interface structures in those devices.