Impacts of extra charges on trap level modulations atcSi/aSiO₂interface: correlations to leakage current recovery in oxide dielectric

Abstract

Reliability issues in metal-oxide-semiconductor field-effect transistor (MOSFET) are closely related to oxide dielectric degradation under electric field stressing, such as stress-induced leakage current (SILC). Some studies show that SILC induced dielectric degradation can be cured by high-temperature annealing while some others show contradictory results. A possible microscopic mechanism could be related to different states of oxygen vacancies in the oxide dielectric because these defects contribute to the leakage current via trap-assisted tunneling (TAT). Here, by first-principles calculations, we demonstrate that the leakage current recovery can be explained in terms of the modulation of trap levels by extra charges. It is found that, with extra holes around the defect, the trap level will be moved far away from the Si valence band and leave the TAT window, which accordingly assists SILC recovery. On the contrary, with extra electrons around the defect, the trap level will be closer to the Si conduction band, having no contribution to the SILC recovery. This study provides a theoretical perspective on the dielectric recovery mechanisms by including the impacts of extra charges.

Defects Induced Charge Trapping/Detrapping and Hysteresis Phenomenon in MoS2 Field-Effect Transistors: Mechanism Revealed by Anharmonic Marcus Charge Transfer Theory

“…2D material-based FETs are no exception. Similar studies have been carried out in traditional silicon transistors − and other electronic devices, such as flash memory devices. , These studies show that the oxide dielectric always has residual defects, , which can act as charge trapping (CT) centers to trap and detrap the channel carriers. CT can cause device performance and reliability issues, for example, bias-temperature instability (BTI) ,, and random telegraph noise (RTN), ,− and this results in threshold voltage shifts (Δ V th) when the gate voltage is applied, − which causes hysteresis of the transfer characteristics.…”