Implementación de arquitectura ROPUF en FPGA para identificación segura de dispositivos

Abstract

En este trabajo se propone la implementación de una arquitectura de funciones físicas no clonables (PUF) de osciladores de anillo en FPGA, y se proporciona un ejemplo de uso en la identificación de dos FPGA Zynq 7000.

Ring Oscillator PUF on FPGA: Design and Characterisation by Using Second-Order Compensated Measurement

“…To obtain the binary response, we will compare the frequencies of pairs of oscillators so that we can construct a 32-bit array, whose first bit (the most significant) will be a 0 or a 1 depending on whether the difference is positive or negative (i.e., the sign of the difference), and the remaining 31 bits will be the result of the subtraction converted to a binary number (Fig 2a). Compensated measurement is a technique that normally uses the sign bit [4] and, in this work, we will use an additional bit extracted from the difference between frequencies, to create a second order binary response twice the length. To obtain the binary response we will use a Zynq 7000 SoC on which we will an array of 51 ring oscillators, thus obtaining 50-bit words by comparing consecutive oscillators [5].…”