2018
DOI: 10.25105/jetri.v15i2.2352
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Implementasi Perangkat Digital Signal Processing Untuk Sistem Visible Light Communication

Abstract: In order to realize a high-speed visible light communication (VLC) system, digital signal processing (DSP) device is required, including the main processing unit, DAC, and ADC. This paper discusses the interface design of the DSP processing unit to 10-bit DAC and 12-bit ADC for VLC applications. The systems in DAC and ADC modules have been designed with a SoC- based approach by using processing unit based on FPGA Xilinx Zynq xc7z010-1CLG400C on the Avnet MicroZed board. The design of hardware-level-design (H/W… Show more

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Cited by 3 publications
(1 citation statement)
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“…According to the overall design requirements of the motor control system, the control chip is Xilinx's ZYNQ series XC7Z010-1CLG400C chip as the FPGA master chip, using its rich IO ports and the host computer and external circuitry to form a complete hardware structure, the ADC chip is TI's TLC1543 type chip, which is a 12-bit sampling The ADC chip is TI's TLC1543 chip, which is a 12-bit sampling accuracy and has 11 analog input channels of analog-to-digital converter, and the data output of TLC1543 follows the serial peripheral interface SPI protocol, through which the conversion process from analog power to digital signal is realized on the FPGA [16]. The overall block diagram of the system is shown in Figure 1.…”
Section: System Hardware Circuit Designmentioning
confidence: 99%
“…According to the overall design requirements of the motor control system, the control chip is Xilinx's ZYNQ series XC7Z010-1CLG400C chip as the FPGA master chip, using its rich IO ports and the host computer and external circuitry to form a complete hardware structure, the ADC chip is TI's TLC1543 type chip, which is a 12-bit sampling The ADC chip is TI's TLC1543 chip, which is a 12-bit sampling accuracy and has 11 analog input channels of analog-to-digital converter, and the data output of TLC1543 follows the serial peripheral interface SPI protocol, through which the conversion process from analog power to digital signal is realized on the FPGA [16]. The overall block diagram of the system is shown in Figure 1.…”
Section: System Hardware Circuit Designmentioning
confidence: 99%