Implementation of an ARM-based system using a Xilinx ZYNQ SoC

Baans, Omar Salem; Jambek, Asral Bahari

doi:10.11591/ijeecs.v13.i2.pp485-491

Cited by 2 publications

(5 citation statements)

References 9 publications

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“…In the first stage the hardware part is constructed, while the second stage includes programming the hardware to operate according to the target and the third stage is specified for debugging the system performance. The zynq FPGA slice consists of processing system (PS) with two ARM Cortex™-A9 processor cores, programmable logic (PL) and a number of intellectual properties components (IPs) [21,22]. The system hardware design depends on instantiating the intellectual properties (IP) cores to PL and attaching it to PS to constitute the desired processor system.…”

Section: Methodsmentioning

confidence: 99%

“…The hardware part of the system is developed by using the IP integrator tool available in the vivado integrated development environment (IDE) [21,22]. Figure 1 shows the block diagram of the zynq FPGA device [26].…”

Section: System Hardware Constructionmentioning

confidence: 99%

“…In the second step the connection operation is performed in the IP integrator environment [21,22]. Figure 4 shows the resultant system hardware, the processing system is connected to the peripherals by AXI-interconnect unit [34,35].…”

Section: Ip Cores Interconnectionmentioning

confidence: 99%

“…The third step implies configuring the FPGAs slice with system bit stream through synthesis, implementation, bit stream generation and down loading operations [21,22]. Xilinx synthesis technology (XST) tool is used in synthesis stage to generate an industry-standard electronic data interchange format (EDIF) file.…”

Section: Fpgas Slice Configurationmentioning

confidence: 99%

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Embedded processor system for controllable period-width multichannel pulse width modulation signals

Khalil

Mohammeed

2021

TELKOMNIKA

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This paper proposes a sophisticated embedded processor system configured on zynq-xc7z020 field programmable gate array (FPGA) device for generating four channels pulse width modulation signals with variable duty cycles and periods using embedded design techniques. The main advantages of the technique are the high ability to perform a simultaneous control on period and pulse width of the generated signals and a high system design adaptation to choose the number of input/output channels. Controlling the the period and the pulse width is achieved by injecting a digital signal to the designed system to manipulate embedded timers' operation. Vivado design suite is used to develop the system hard ware in the integrated development environment where the processing unit and peripherals are instantiated and interconnected. A practical aplication program in C language is prepared to make the system act according to the target. The designed system can be used to drive multi-phase D.C to D.C convertors. The system performance is verified by using vivado logic analyzer and chipscope windows. The superiority of the proposed approach over other approaches is that it resulted in a multi-inputs/multi-outputs pulse width modulation system with high controllability on the pulse width and the period that ranges from 15 nsec to 60 sec.

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Section: Methodsmentioning

confidence: 99%

Section: System Hardware Constructionmentioning

confidence: 99%

Section: Ip Cores Interconnectionmentioning

confidence: 99%

Section: Fpgas Slice Configurationmentioning

confidence: 99%

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Embedded processor system for controllable period-width multichannel pulse width modulation signals

Khalil

Mohammeed

2021

TELKOMNIKA

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“…Our hardware-centric design approach resulted in a highly optimized, real-time SoC-based monitoring device that can identify and track illegal UAVs. Being a SoC-embedded system, the device could be small and battery-powered, making it very portable and cost-effective (Omar Salem Baans, 2019).…”

Section: Introductionmentioning

confidence: 99%

FPGA-Based CNN for Real-Time UAV Tracking and Detection

Hobden

Srivastava

Nurellari

2022

Front. Space Technol.

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Neural networks (NNs) are now being extensively utilized in various artificial intelligence platforms specifically in the area of image classification and real-time object tracking. We propose a novel design to address the problem of real-time unmanned aerial vehicle (UAV) monitoring and detection using a Zynq UltraScale FPGA-based convolutional neural network (CNN). The biggest challenge while implementing real-time algorithms on FPGAs is the limited DSP hardware resources available on FPGA platforms. Our proposed design overcomes the challenge of autonomous real-time UAV detection and tracking using a Xilinx’s Zynq UltraScale XCZU9EG system on a chip (SoC) platform. Our proposed design explores and provides a solution for overcoming the challenge of limited floating-point resources while maintaining real-time performance. The solution consists of two modules: UAV tracking module and neural network–based UAV detection module. The tracking module uses our novel background-differencing algorithm, while the UAV detection is based on a modified CNN algorithm, designed to give the maximum field-programmable gate array (FPGA) performance. These two modules are designed to complement each other and enabled simultaneously to provide an enhanced real-time UAV detection for any given video input. The proposed system has been tested on real-life flying UAVs, achieving an accuracy of 82%, running at the full frame rate of the input camera for both tracking and neural network (NN) detection, achieving similar performance than an equivalent deep learning processor unit (DPU) with UltraScale FPGA-based HD video and tracking implementation but with lower resource utilization as shown by our results.

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Implementation of an ARM-based system using a Xilinx ZYNQ SoC

Cited by 2 publications

References 9 publications

Embedded processor system for controllable period-width multichannel pulse width modulation signals

Embedded processor system for controllable period-width multichannel pulse width modulation signals

FPGA-Based CNN for Real-Time UAV Tracking and Detection

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