Implementation of Central Pattern Generator in an FPGA-Based Embedded System

Abstract

This paper proposes an embedded system on a chip to generate locomotion patterns of periodic rhythmic movements inspired by biological neural networks called Central Pattern Generators (CPGs) found in animal nervous system. The proposed system contains a custom digital module, attached to an embedded processor, that mimics the functionality and organization of the fundamental Amari-Hopfield CPG. In order to reduce the CPG hardware integration complexity as well as to provide flexibility, an embedded linux operating system running on a processor is used to deal with the CPG interfacing in a high level transparent way for application development. The system is implemented on a Field Programmable Gate Array (FPGA) device providing a compact, flexible and expandable solution for generating periodic rhythmic patterns in robot control applications. Results show that the obtained waveforms from the FPGA implementation agree with software simulations and preserve the easiness of CPG parameter setting for adaptive behavior.

A Survey on CPG-Inspired Control Models and System Implementation

“…Table II lists the representative hardware CPGs applied to real robots successfully. They can grossly be divided into two classes, those that are built as silicon chips [77], [111], [138]- [141], [146], [147] and those that are implemented through field programmable gate arrays (FPGAs) [142]- [145].…”

CPG Implementations for Robot Locomotion: Analysis and Design

“…This approach provide the hardware efficiency with software flexibility. In (Torres-Huitzil, 2008), Torres and Girau present an implementation of a CPG module based on the Amari-Hopfield structure into pure FPGA hardware. In their work, they have chosen to attached the CPG implementation to a Microblaze soft-core processor running uclinux.…”

“…An approach for embedded implementations is the use of 2s complement fixed point representation with a dedicated wordlength that better matches the FPGA computational resources and that saves further silicon area at the cost of precision, and b) efficiency and flexibility, embedded hard processor cores or configurable soft processors developed by FPGA vendors add the software programmability of optimized processors to the fine grain parallelism of custom logic on a single chip (Torres-Huitzil, 2008). In the field of neural processing, several applications mix real-time or low-power constraints with a need for flexibility, so that FPGAs appear as a well-fitted implementation solution.…”

Efficient implementation of FPGA based central pattern generator using distributed arithmetic

“…Another LUT for neuron v takes a similar form. Notice that the transfer function is replaced by a saturation function without significantly reducing the quality and generality of the rhythmic patterns [6]. The DA-based Amari-Hopfield neuron architecture is showed in Fig.…”

“…Nevertheless, works based on Very large Scale Integrated Circuit (VLSI) need a relatively longer design circle and they are lack of flexibility and compatibility comparing to those on Field Programmable Logic Arrays (FPGAs). Although FPGAs have been intensively used in hardware implementation of Artificial Neuron Networks (ANNs) [4] and intelligent control systems [5], very few works of FPGA-based CPG implementations are reported [6]. On the other hand, the previous works use straight-forward implementation methods which does not make the best of FPGA resources.…”