Implementation of Delay-Time-Based Nonquasi-Static Bipolar Transistor Models in Circuit Simulators

Huszka, Z.; Chakravorty, Anjan

doi:10.1109/ted.2014.2327664

Cited by 3 publications

(3 citation statements)

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“…The function in code Excerpt with the NQS model parameter α IT

italicTD = italicdstrip ((),, α_{IT} \cdot italictf, 1 e - 15 \cdot t 0);

makes TD a virtually constant delay time with zero derivatives. This was termed the “instance” value in Huszka and Chakravorty . Actually, transforms the bias dependent HICUM case to the bias independent implementation of VBIC with k = 1.…”

Section: Case Studiesmentioning

confidence: 99%

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Suppressing derivatives of selected variables in Verilog‐A

Huszka

Molnar

2019

Circuit Theory & Apps

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A former scaling technique made it possible to eliminate the effect of the automatically generated derivatives at bipolar non-quasi-static (NQS) modeling in Verilog-A. An alternative technique is proposed here, which makes the derivatives of selected variables zero. The method was verified on the examples of bipolar NQS variants. The confirming results open a new perspective for increasing the flexibility of Verilog-A compact modeling along with the reduction of computational efforts. KEYWORDS bipolar transistor, compact model, derivative management, non-quasi-static effects, Verilog-A | INTRODUCTIONThe Verilog-A analog subset 1 of hardware description languages has become the standard for defining compact models. 2 It has been accepted and recommended for this purpose by the Compact Modeling Coalition. 3 It enables model construction focusing primarily on device physics with none or just a minimal consideration for numerical algorithms. These details are left primarily on a new program block the Verilog-A compiler. 4-6 It translates the model instructions to C++ code, which can be used either directly or typically after some further optimizations by the simulator providers.One of the main features of this compiler is the automated computation of the derivatives with respect to the system variables. The derivatives are needed for the robust solution of the system matrix by the Newton-Raphson (NR) method. The matrix linearized this way provides the basis for small signal analysis.The hand-coded derivatives often led to slow or no convergence; therefore, their automatic computation is a significant achievement. At the same time, new issues were found at the Verilog-A implementation of the vertical non-quasi-static (NQS) effect of bipolar (hetero) junction transistors. It turned out that the well-behaving adjunct network solution of the VBIC model 7 did not provide the expected results in HICUM. 8 It was found that the derivative of the delay time TD related charge element (TD ⋅ V) in the adjunct network produced terms proportional to the derivatives of TD. Such "undesired derivatives" are not present in VBIC since the delay time is constant there as opposed to the bias dependent TD of HICUM. Similar charge expressions can be found in Verilog-A models elsewhere without implying "undesired derivative" issues. It appears inconsistent at first sight. However, it was theoretically proven that in this specific case, the generated surplus derivatives really distorted the result. 9 The problem could be solved by adopting a scaling with t 0 /TD to the adjunct network. It puts a constant t 0 time parameter in the charge terms while relocated TD to the non-energy-storing components. 10 This avoided the generation of the TD derivatives in the charge elements. The method made it possible for the HICUM providers to implement the Weil-McNamee NQS approach 11 in their Verilog-A model code.An alternative scenario could be obtained by leaving TD in its original place but then suppressing its derivatives some way. This would be a sol...

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“…The function in code Excerpt with the NQS model parameter α IT

italicTD = italicdstrip ((),, α_{IT} \cdot italictf, 1 e - 15 \cdot t 0);

Section: Case Studiesmentioning

confidence: 99%

“…It appears inconsistent at first sight. However, it was theoretically proven that in this specific case, the generated surplus derivatives really distorted the result . The problem could be solved by adopting a scaling with t 0 / TD to the adjunct network.…”

Section: Introductionmentioning

confidence: 98%

Suppressing derivatives of selected variables in Verilog‐A

Huszka

Molnar

2019

Circuit Theory & Apps

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“…They go from enhancing possibilities given by standard models, through implementing entirely new ones to constructing new macro-models formed by standard models. From the recent publications, we can point out the following articles [1][2][3][4][5][6][7][8][9] that are entirely or partly focused on model improvement in the SPICE simulators. The second direction of the development is targeted to algorithms used during simulation.…”

Section: Introductionmentioning

confidence: 99%

Efficient Procedure Improving Precision of High Conditioned Matrices in Electronic Circuits Analysis

Cerny¹,

Dobeš²,

Banas³

2018

RADIOENGINEERING

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In this article, we propose several improvements that could be done to SPICE simulator. The first is based on a functional implementation of device models. The advantages of functional implementation are demonstrated on basic Shichman-Hodges model of MOS transistor. It starts with a description of primary algorithms used in SPICE simulator for the solution of circuits with nonlinear devices and identify the problems that can occur during simulations. Main part of the article is devoted to improved factorization procedure for simulation of the nonlinear electronic circuits. The primary intention of the proposed method is to increase final precision of the result in a case of high condition linear systems. The procedure is based on a use of the iterative methods for solution of nonlinear and linear equations. Utilizing those methods for one iterative process helps to reduce memory consumption during simulation computation, and it can significantly improve simulation precision. The procedure allows to use enumeration with definable precision in a very efficient way.

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