Implementation of Duplicate TRNG on FPGA by Using Two Different Randomness Source

Tuncer, Taner

doi:10.5755/j01.eee.21.4.12779

Cited by 19 publications

(10 citation statements)

References 16 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…The output bit rate of the system implemented on the Xilinx Virtex II Pro FPGA was measured to be 2.5 Mbs. Other TRNG designs using ROs were also proposed by Kollhenberger and Gaj [16], Golic [17], Dichtl and Golic [18], Tuncer [19], and Avaroglu [8].…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA

Gari̇pcan

Erdem

2019

Informacije MIDEM

View full text Add to dashboard Cite

In this study, hardware implementation and evaluation of a true random number generator (TRNG) is presented. For the implementation, Field Programmable Gate Array (FPGA) hardware, in which numerical processes based on an algorithmic basis are carried out, was used. In the system, ring oscillators (ROs) with similar structures were used as a noise source, and true randomness was obtained by sampling the jitter signals originating from the oscillators. However, the most critical cryptographic disadvantage of jitterbased TRNGs is the statistical inadequacy of the system. At this point, in contrast to existing designs, entropy sources derived from the subsets of ROs were used in the sampling and post-processing stage. The statistical quality of the system was improved by using true random numbers/inputs obtained from these entropy sources in the sampling and post-processing stage. With sampling and postprocessing inputs, the use of complex post-processing techniques that limit the output bit rate of the generator in the system was not required. Thus, a high-performance adaptable TRNG model with reduced hardware resource consumption is obtained. The statistical validation of the TRNG, which was tested in 6 different scenarios for two separate ring oscillator (RO) architectures and three different operating frequencies, was performed with the NIST 800-22 and AIS31 test packages.

show abstract

Section: Related Workmentioning

confidence: 99%

“…The jitter occurs as a natural result of flicker, shot and thermal noise which depend on the generation and operating conditions of the logic circuit elements. Periodic irregularity and uncertainty occurring in clock signals due to jitter increases over time as depicted in Figure 2 (a) [2,9,19].…”

Section: Generic Architecture Of the Proposed Trngmentioning

confidence: 99%

Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA

Gari̇pcan

Erdem

2019

Informacije MIDEM

View full text Add to dashboard Cite

show abstract

“…The post processing unit has been generally used for producing the internal RNs and enhancing the randomness of the signal. The output of the post processing unit is called as the internal RN …”

Section: Basic Conceptsmentioning

confidence: 99%

“…The output of the post processing unit is called as the internal RN. 54,[63][64][65] TRNG, which is a vital element for cryptographic applications, has a fundamental effect on the randomness of the produced numbers and the security of cryptographic applications. From this point of view, TRNG that is designed for use in cryptographic applications should pass the test suites whose reliability is approved by international standards.…”

Section: True Random Number Generatormentioning

confidence: 99%

A novel high speed Artificial Neural Network–based chaotic True Random Number Generator on Field Programmable Gate Array

Alçın

Koyuncu

Tuna

et al. 2018

Circuit Theory & Apps

View full text Add to dashboard Cite

Summary It is well observed that cryptographic applications have great challenges in guaranteeing high security as well as high throughput. Artificial neural network (ANN)–based chaotic true random number generator (TRNG) structure has not been unprecedented in current literature. This paper provides a novel type of high‐speed TRNG based on chaos and ANN implemented in a Xilinx field‐programmable gate array (FPGA) chip. The paper consists of two main parts. In the first part, chaos analyses of Pehlivan‐Uyaroglu_2010 chaotic system (PUCS) have been accomplished to prove that PUCS operates in chaotic regime. So PUCS can be an efficient alternative to the entropy source for classical TRNGs. In the second part, the hardware design of the proposed TRNG has been created using VHDL in Xilinx platform. As a result, the implemented TRNG offers throughput up to 115.794 Mbps. Besides, the generated random numbers have been tested with the FIPS 140‐1 and NIST 800.22 test suites. The high quality of generated true random numbers have been confirmed by passing all randomness tests. The results have shown that the proposed system can provide not only high throughput but also high quality random bit sequences for a wide variety of embedded cryptographic applications.

show abstract

“…However, there are true random number generators, which are non-deterministic, physical random number generators (TRNG's). Today, true random number generators are required in many diverse fields of everyday life, such as cryptography, mobile communication, e-mails, online payments, cash-free payments, ATM's, ebanks, e-sales, sales points and prepaid cards [3,4].…”

Section: Introductionmentioning

confidence: 99%

Generating Random Numbers from Biological Signals in LabVIEW Environment and Statistical Analysis

Kaya¹,

Tuncer²

2019

View full text Add to dashboard Cite

This paper explores the generation of random numbers, using electromyographic (EMG) signals collected from arm, elbow and finger movements of healthy individuals. The original signals were extracted from the Ninaweb database. The author designed a new discretization algorithm to convert these signals from floating point numbers to discrete values, and proposed a true random number generator (TRNG) structure that obtain the EMG signals with human arm and finger movements as noise sources. The proposed algorithm was applied to obtain and process real-time signals in the LabVIEW environment, and verified through NIST, TestU01, Scale index and autocorrelation tests. The results show that the discretization algorithms in TRNGs faced a huge data loss (70 %), while the designed algorithm with our structure lost no data and achieved 100 % efficiency in number generation. The research results prove the possibility of generating random numbers from biological signals.

show abstract

Implementation of Duplicate TRNG on FPGA by Using Two Different Randomness Source

Cited by 19 publications

References 16 publications

Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA

Implementation of a Digital TRNG Using Jitter Based Multiple Entropy Source on FPGA

A novel high speed Artificial Neural Network–based chaotic True Random Number Generator on Field Programmable Gate Array

Generating Random Numbers from Biological Signals in LabVIEW Environment and Statistical Analysis

Contact Info

Product

Resources

About