Implementation of dynamic voltage frequency scaling on a processor for wireless sensing applications

Antonio, Ryan Albert G.; Costa, Rafael Mari de la; Ison, Aldrin R. S.; Lim, Wesley Kaiser; Pajado, Robert Adrian; Roque, Deanne Bianca; Yutuc, Ruelle; Densing, Chris Vincent; Leon, Maria Theresa de; Rosales, Marc; Alarcón, Louis P.

doi:10.1109/tencon.2017.8228368

Cited by 3 publications

(3 citation statements)

References 9 publications

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“…High frequency for the data processing of image sensor nodes is beneficial for lowering overall energy consumption. Authors in [21] state that the power savings achieved with DVFS can be quantified. DVFS yields quadratic energy savings and, the system using DVFS finishes the task at the same deadline but does so at a lower energy consumption.…”

Section: Related Workmentioning

confidence: 99%

Dynamic Voltage and Frequency Scaling as a Method for Reducing Energy Consumption in Ultra-Low-Power Embedded Systems

Zidar,

Matić,

Aleksi

et al. 2024

Electronics

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Dynamic voltage and frequency scaling (DVFS) is a technique used to optimize energy consumption in ultra-low-power embedded systems. To ensure sufficient computational capacity, the system must scale up its performance settings. The objective is to conserve energy in times of reduced computational demand and/or when battery power is used. Fast Fourier Transform (FFT), Cyclic Redundancy Check 32 (CRC32), Secure Hash Algorithm 256 (SHA256), and Message-Digest Algorithm 5 (MD5) are focused functions that demand computational power to achieve energy-efficient performance. Selected operations are analyzed from the energy consumption perspective. In this manner, the energy required to perform a specific function is observed, thereby mitigating the influence of the instruction set or system architecture. For stable operating voltage scaling, an exponential model for voltage calculation is presented. Statistical significance tests are conducted to validate and support the findings. Results show that the proposed optimization technique reduces energy consumption for ultra-low-power applications from 27.74% to up to 47.74%.

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Section: Related Workmentioning

confidence: 99%

Dynamic Voltage and Frequency Scaling as a Method for Reducing Energy Consumption in Ultra-Low-Power Embedded Systems

Zidar,

Matić,

Aleksi

et al. 2024

Electronics

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“…On the custom chip level there are still significant advancements being made to further reduce energy consumption of chip-internal component primitives such as clock gates [20]. DVFS slowly trickles down to smaller, more constrained target devices, stretching across data centers [4], personal computers, laptops and smartphones to wireless sensor nodes [12,2]. With D 2 VFS , Ahmed et al [1] recently proposed a discrete DVFS variant that moves this further onto the intermittent device class.…”

Section: Related Workmentioning

confidence: 99%

“…Antonio et al [2] aim for a programmable power management on WSN-class devices that controls DVFS and power gating on the chip level. They design and evaluate a custom CPU based on an open-source 16-bit processor library and integrate clock gating and DVFS.…”

Section: Related Workmentioning

confidence: 99%

FlexClock: Generic Clock Reconfiguration for Low-end IoT Devices

Rottleuthner¹,

Schmidt²,

Wählisch³

2021

Preprint

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Clock configuration within constrained general-purpose microcontrollers takes a key role in tuning performance, power consumption, and timing accuracy of applications in the Internet of Things (IoT). Subsystems governing the underlying clock tree must nonetheless cope with a huge parameter space, complex dependencies, and dynamic constraints. Manufacturers expose the underlying functions in very diverse ways, which leads to specialized implementations of low portability.In this paper, we propose FlexClock, an approach for generic online clock reconfiguration on constrained IoT devices. We argue that (costly) generic clock configuration of general purpose computers and powerful mobile devices need to slim down to the lower end of the device spectrum. In search of a generalized solution, we identify recurring patterns and building blocks, which we use to decompose clock trees into independent, reusable components. With this segmentation we derive an abstract representation of vendor-specific clock trees, which then can be dynamically reconfigured at runtime. We evaluate our implementation on common hardware. Our measurements demonstrate how FlexClock significantly improves peak power consumption and energy efficiency by enabling dynamic voltage and frequency scaling (DVFS) in a platform-agnostic way.

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