2017 International Conference on Wireless Communications, Signal Processing and Networking (WiSPNET) 2017
DOI: 10.1109/wispnet.2017.8300117
|View full text |Cite
|
Sign up to set email alerts
|

Implementation of Ex-OR gate using QCA with NNI logic

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2

Citation Types

0
2
0

Year Published

2018
2018
2024
2024

Publication Types

Select...
3
2

Relationship

0
5

Authors

Journals

citations
Cited by 5 publications
(2 citation statements)
references
References 16 publications
0
2
0
Order By: Relevance
“…TDMA requires a network controller to assign unique time slots to different motes, via extra messages exchanged between the motes and the reader [52]. Pre-Generated and Stored on Shift Registers [50] J-K Flip-Flop Synchronization Circuit [53] Ferromagnetic Cladding [54] XOR Gates [56] The binary tree protocol is used to select one mote from those in the interrogation zone of the reader. This is done by the reader sending commands and narrowing it down to a particular mote.…”
Section: Mac Layer For Micro-scale Designmentioning
confidence: 99%
See 1 more Smart Citation
“…TDMA requires a network controller to assign unique time slots to different motes, via extra messages exchanged between the motes and the reader [52]. Pre-Generated and Stored on Shift Registers [50] J-K Flip-Flop Synchronization Circuit [53] Ferromagnetic Cladding [54] XOR Gates [56] The binary tree protocol is used to select one mote from those in the interrogation zone of the reader. This is done by the reader sending commands and narrowing it down to a particular mote.…”
Section: Mac Layer For Micro-scale Designmentioning
confidence: 99%
“…For implementation in micro-scale, XOR gates can be used to multiply the spreading code with the sensed data, and the static spreading codes are assigned to the motes during the design stage and stored using registers. Implementation of XOR gates in micro-scale has been demonstrated in [56].…”
Section: Mac Layer For Micro-scale Designmentioning
confidence: 99%