Implementation of fast HEVC encoder based on SIMD and data-level parallelism

Ahn, Yong-Jo; Hwang, Tae‐Kon; Sim, Donggyu; Han, Woo-Jin

doi:10.1186/1687-5281-2014-16

Cited by 50 publications

(41 citation statements)

References 14 publications

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“…Parallelizing DCT with SIMD instructions was one of the targets of [4]. In [5] a combined CPU-GPUs approach for parallel motion estimation is presented, while [6] includes a comparative study between motion estimation parallelism using CUDA cores, MPI and OpenMP.…”

Section: Related Workmentioning

confidence: 99%

“…In [9] the problem of balancing slices was tackled by introducing more slices than the number of available cores. In HEVC, the authors in [10] evaluated slice parallelism using fixed slices under various encoding scenarios, while in [4] the CTU cost estimation used for adapting slice size, was based on weighting upon the depth of each CU comprising the CTU. Last, in [11] the GOP structure for LD setting was used to estimate CTU cost.…”

Section: Related Workmentioning

confidence: 99%

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Heuristics for tile parallelism in HEVC

Koziri

Papadopoulos

Tziritas

et al. 2017

2017 25th European Signal Processing Conference (EUSIPCO)

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Abstract-HEVC has emerged as the new video coding standard promising increased compression ratios compared to its predecessors. This performance improvement comes at a high computational cost. For this reason, HEVC offers three coarse grained parallelization potentials namely, wave front, slices and tiles. In this paper we focus on tile parallelism which is a relatively new concept with its effects not yet fully explored. Particularly, we investigate the problem of partitioning a frame into tiles so that in a resulting one on one tile-CPU core assignment the cores are load balanced, thus, maximum speedup can be achieved. We propose various heuristics for the problem with a focus on low delay coding and evaluate them against state of the art approaches. Results demonstrate that particular heuristic combinations clearly outperform their counterparts in the literature.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Heuristics for tile parallelism in HEVC

Koziri

Papadopoulos

Tziritas

et al. 2017

2017 25th European Signal Processing Conference (EUSIPCO)

View full text Add to dashboard Cite

show abstract

“…The technique was implemented on hardware-based approach over VLSI architecture. Ahn et al [10] have discussed various optimization techniques using H.265 with the aid of parallel processing. Also, the authors have presented a task scheduling technique along with slicing process in parallelization over multicourse using H.265.…”

Section: Literature Surveymentioning

confidence: 99%

An Efficient and Robust High Efficiency Video Coding Framework to Enhance Perceptual Quality of Real-Time Video Frames

Svn¹,

Sujatha²

2016

ijacsa

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Abstract-Different level of compression on real-time video streaming has successfully reduced the storage space complexities and bandwidth constraints in the recent times. This paper aims to design and develop a novel concept towards the enhancement of perceptual quality of a real-time video frames. The proposed model has been experimented considering multilevel compression operation using H.265 where .avi moving frames standards play a crucial role. The study also applies a novel concept of High-efficiency video coding (HEVC) for adaptive live video streaming over a mobile network. The proposed study aims to formulate a multi-level optimization for HEVC to enhance the performance of both encoding and decoding mechanisms at the client as well as server side to ensure higher compression rate. The experimental outcomes also show that the proposed protocol achieves better performance ratio and overall; throughput in comparison with conventional H.263, H.264 by enhancing the perceptual quality of .avi format realtime video frames.

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“…But in this paper, we mainly optimize HEVC encoding. Ahn et al [11] parallelized HEVC encoder interpolation filter, cost function, and transform to reduce the complexity of HEVC, which is caused by single instruction, multiple data (SIMD) operations, and data-level parallelism. Min et al [12] proposed a distributed video coding method with a hierarchical group of picture structure.…”

Section: Related Workmentioning

confidence: 99%

Fast and adaptive mode decision and CU partition early termination algorithm for intra-prediction in HEVC

Zhang

Zhai

Liu

2017

J Image Video Proc.

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High Efficiency Video Coding (HEVC or H.265), the latest international video coding standard, displays a 50% bit rate reduction with nearly equal quality and dramatically higher coding complexity compared with H.264. Unlike other fast algorithms, we first propose an algorithm that combines the CU coding bits with the reduction of unnecessary intra-prediction modes to decrease computational complexity. In this study, we first analyzed the statistical relationship between the best mode and the costs calculated through Rough Mode Decision (RMD) process and proposed an effective mode decision algorithm in intra-mode prediction process. We alleviated the computation difficulty by carrying out the RMD process in two stages, reducing 35 modes down to 11 modes in the first RMD process stage, and adding modes adjacent to the most promising modes selected during the first stage into the second RMD stage. After these two stages, we had two or three modes ready to be used in the rate distortion operation (RDO) process instead of the three or eight in the original HEVC process, which significantly reduced the number of unnecessary candidate modes in the RDO process. We then used the coding bits of the current coding unit (CU) as the main basis for judging its complexity and proposed an early termination method for CU partition based on the number of coding bits of the current CU. Experimental results show that the proposed fast algorithm provides an average time reduction rate of 53% compared to the reference HM-16.12, with only 1.7% Bjontegaard delta rate increase, which is acceptable for Rate-Distortion performance.

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Implementation of fast HEVC encoder based on SIMD and data-level parallelism

Cited by 50 publications

References 14 publications

Heuristics for tile parallelism in HEVC

Heuristics for tile parallelism in HEVC

An Efficient and Robust High Efficiency Video Coding Framework to Enhance Perceptual Quality of Real-Time Video Frames

Fast and adaptive mode decision and CU partition early termination algorithm for intra-prediction in HEVC

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