Implementation of Low Power 8-Bit Multiplier Using Gate Diffusion Input Logic

Abstract

Multiplier is the most commonly used circuit in digital devices. Multiplication is one of the basic functions used in digital signal processing. Gate Diffusion Input (GDI) logic reduces the power dissipation and area of digital circuits while maintaining low complexity of logic design. In this paper, GDI technique is used for low-power design of 8-bit multiplier. Reduction in power and area can be achieved using Booth encoding and Wallace tree technique since they generate partial products efficiently and are most suited for multiplication of signed numbers. Multiplier designed in GDI logic requires lesser number of devices as compared to CMOS logic [3]. Hence, GDI multiplier substantially dissipates lesser power as compared to CMOS design.

Design and Performance Analysis of Various Adders and Multipliers Using GDI Technique

“…Multiplication is an of adding a number or integer to itself, for a described number of times. We apply the GDI technique for the implementation of the multiplier that reduces its power and area to greater extent [7]. The schematic of conventional GDI based multiplier is show To implement the multiplier function, we use the GDI based full adder and GDI based AND gates.…”

Efficient Implementation of Multiplier for Digital FIR Filters

“…where F (z) is the FIR"s transfer function defined in the zdomain by (4) The L th -order LTI FIR filter is graphically interpreted in Figure.1. It consists of a collection of a "tapped delay line," adders, and multipliers.…”

“…The multiplier has been constructed in its simplest conceptual form. We will be using original Booth's Algorithm (Radix 4 encoding) for the Booth Encoder [4]. The 2's Complement Generator is used to generate the two"s complement of the multiplicand.…”

UCM: A Novel Approach for Delay Optimization

“…There are various multiplier circuits explained in literature that mainly focus on the issues of power consumption, delay of the multiplier circuit, and lesser area [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18]. However, according to these studies, it was found that the area and the speed of operation are the two most conflicting design constraints.…”