Implementation of Trench-based Power LDMOS and Low Voltage MOSFET on InGaAs

Adhikari, Manoj Singh; Singh, Yashvir

doi:10.1080/02564602.2018.1450651

Cited by 8 publications

(1 citation statement)

References 33 publications

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“…The SiC MOSFETs used in this study include the planar gate structure [ 35 ], dual trench structure [ 36 , 37 ] and asymmetric trench structure [ 38 , 39 , 40 , 41 , 42 , 43 ] ( Figure 1 ). The SiC MOSFET with a planar gate structure ( Figure 1 a) has the gate electrode placed on top of the gate insulator, which is typically made of silicon dioxide (SiO 2 ) or a high-k dielectric.…”

Section: Methodsmentioning

confidence: 99%

The Influence of Special Environments on SiC MOSFETs

Li,

Jiang,

et al. 2023

Materials

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In this work, the influences of special environments (hydrogen gas and high temperature, high humidity environments) on the performance of three types of SiC MOSFETs are investigated. The results reveal several noteworthy observations. Firstly, after 500 h in a hydrogen gas environment, all the SiC MOSFETs exhibited a negative drift in threshold voltage, accompanied by an increase in maximum transconductance and drain current (@ VGS/VDS = 13 V/3 V). This phenomenon can be attributed to that the hydrogen atoms can increase the positive fixed charges in the oxide and increase the electron mobility in the channel. In addition, high temperature did not intensify the impact of hydrogen on the devices and electron mobility. Instead, prolonged exposure to high temperatures may induce stress on the SiO2/SiC interface, leading to a decrease in electron mobility, subsequently reducing the transconductance and drain current (@ VGS/VDS = 13 V/3 V). The high temperature, high humidity environment can cause a certain negative drift in the devices’ threshold voltage. With the increasing duration of the experiment, the maximum transconductance and drain current (@ VGS/VDS = 18V (20 V)/3 V) gradually decreased. This may be because the presence of moisture can lead to corrosion of the devices’ metal contacts and interconnects, which can increase the devices’ resistance and lead to a decrease in the devices’ maximum transconductance and drain current.

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Section: Methodsmentioning

confidence: 99%

The Influence of Special Environments on SiC MOSFETs

Li,

Jiang,

et al. 2023

Materials

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Implementation of Low Voltage MOSFET and Power LDMOS on InGaAs

Adhikari

Patel²,

Verma

et al. 2021

Silicon

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In this paper, a new low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) have been proposed with concept of integration based on trench technology on InGaAs material. Junction isolation technique is used for the implementation of a low voltage MOSFET and a high power dual gate MOSFET in same InGaAs epitaxial layer side by side. The HV DG MOSFET consists of dual gate that are placed in drift region under the oxide-lled trenches. The proposed structure minimize on-resistance (R on ) along with increased breakdown voltage (V br ) due to enhanced RESURF effect, the creation of dual channels, and due to folding technique of drift region in vertical direction. In the HV DG MOSFET, the drain current (I D ) increases leading to enhanced transconductance (gm) by simultaneous conduction of channels with improved maximum oscillation frequency (f max ) and cut-off frequency (f t ). On the other side, the low voltage MOSFET consists of a gate placed in a centre of the structure within an oxide trench to create two n-channels in the p-base. The two channels are conducting in parallel and give substantial enhancement in peak g m , I D , f max and f t with more control over the short channel parameters. The design and performance analysis of low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) are carried out on 2-D ATLAS device simulator.

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