Implementation strategy of wafer-plane and aerial-plane inspection for advanced mask manufacture

Kim, Won-Sun; Chung, Dong-Hoon; Jeon, Chan-Uk; Cho, Han-Ku; Huang, William; Miller, John D.; Inderhees, Gregg; Pinto, Becky; Hur, Jiuk; Park, Kihun; Han, Jay J.

doi:10.1117/12.824289

Cited by 4 publications

(1 citation statement)

References 5 publications

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“…The Applied Materials AERA™ inspection system is an aerial-image-based mask-inspection system. [84][85][86][87][88][89][130][131][132][133][134] KLA has introduced WPI/API to examine the impact on the wafer as a way to filter defects on mask. [135][136][137] Brion Technologies and NuFlare developed off-line lithography simulation software for the NuFlare mask inspection system.…”

Section: Curvilinear Mask Inspectionmentioning

confidence: 99%

Inverse lithography technology: 30 years from concept to practical, full-chip reality

Pang

2021

J. Micro/Nanopattern. Mats. Metro.

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In lithography, optical proximity and process bias/effects need to be corrected to achieve the best wafer print. Efforts to correct for these effects started with a simple bias, adding a hammer head in line-ends to prevent line-end shortening. This first-generation correction was called rule-based optical proximity correction (OPC). Then, as chip feature sizes continued to shrink, OPC became more complicated and evolved to a model-based approach. Some extra patterns were added to masks, to improve the wafer process window, a measure of resilience to manufacturing variation. Around this time, the concept of inverse lithography technology (ILT), a mathematically rigorous inverse approach that determines the mask shapes that will produce the desired on-wafer results, was introduced. ILT has been explored and developed over the last three decades as the next generation of OPC, promising a solution to several challenges of advanced-node lithography, whether optical or extreme ultraviolet (EUV). Today, both OPC and ILT are part of an arsenal of lithography technologies called resolution enhancement technologies. Since OPC and ILT both involve computation, they are also considered as part of computational lithography. We explore the background and history of ILT and detail the significant milestones that have taken full-chip ILT from an academic concept to a practical production reality.

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Section: Curvilinear Mask Inspectionmentioning

confidence: 99%

Inverse lithography technology: 30 years from concept to practical, full-chip reality

Pang

2021

J. Micro/Nanopattern. Mats. Metro.

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Your worst nightmare: inspection of aggressive OPC on 14nm masks with emphasis on defect sensitivity and wafer defect print predictability

Badger¹,

Hibbs²,

Rankin³

et al. 2013

SPIE Proceedings

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To prevent catastrophic failures during wafer manufacturing, mask manufacturers employ sophisticated reticle inspection systems to examine every image on every reticle to identify defects. These advanced systems inspect at resolutions typically 3x higher at the reticle-plane than advanced wafer scanners; thus enabling them to detect the small defects necessary to ensure reticle quality.The most thorough inspection is done using a reticle-to-database comparison that ensures the reticle pattern matches the design pattern. For high defect sensitivity, the database must be carefully modeled to exactly match the reticle pattern. Further, sub-resolution OPC shapes are often at the limit of the mask manufacturing process, which adds subtle variations on such shapes across the reticle. These modeling errors and process variations can cause high numbers of unwanted detections, thereby limiting inspection system defect detection sensitivity. [1] OPC designs are expected to become more aggressive for future generations and may stress the performance of current reticle inspection systems. To systematically assess the capability of various inspection approaches and identify needed areas for improvement, a new "Nightmare" test reticle has been designed by IBM. The test reticle contains various sizes and shapes of sub-resolution features that might appear on reticle generations from today's 22nm to future 7nm. It also contains programmed defects to assess defect detection capability of current and future generation inspection systems. This paper will discuss the design of the "Nightmare" test reticle, and the inspection results of the current generation reticle inspection methods with emphasis on both inspectability and defect sensitivity. The subresolution features will be ranked according to importance for advanced OPC design. The reticle will also be evaluated using wafer print simulation so lithographic impact of features and defects can be measured and compared against inspection approaches and results.

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Inspection of complex OPC patterns for 4x node and beyond

et al. 2009

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Implementation strategy of wafer-plane and aerial-plane inspection for advanced mask manufacture

Cited by 4 publications

References 5 publications

Inverse lithography technology: 30 years from concept to practical, full-chip reality

Inverse lithography technology: 30 years from concept to practical, full-chip reality

Your worst nightmare: inspection of aggressive OPC on 14nm masks with emphasis on defect sensitivity and wafer defect print predictability

Inspection of complex OPC patterns for 4x node and beyond

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